Lines Matching refs:output
406 struct tegra_output output; member
479 static inline struct tegra_sor *to_sor(struct tegra_output *output) in to_sor() argument
481 return container_of(output, struct tegra_sor, output); in to_sor()
1158 u64 input, output, watermark, num; in tegra_sor_compute_config() local
1167 output = link_rate * 8 * link->lanes; in tegra_sor_compute_config()
1169 if (input >= output) in tegra_sor_compute_config()
1173 params.ratio = div64_u64(input * f, output); in tegra_sor_compute_config()
1287 struct tegra_dc *dc = to_tegra_dc(sor->output.encoder.crtc); in tegra_sor_mode_set()
1492 struct drm_crtc *crtc = sor->output.encoder.crtc; in tegra_sor_show_crc()
1654 struct drm_crtc *crtc = sor->output.encoder.crtc; in tegra_sor_show_regs()
1685 struct tegra_output *output = connector_to_output(connector); in tegra_sor_late_register() local
1689 struct tegra_sor *sor = to_sor(output); in tegra_sor_late_register()
1706 struct tegra_output *output = connector_to_output(connector); in tegra_sor_early_unregister() local
1708 struct tegra_sor *sor = to_sor(output); in tegra_sor_early_unregister()
1735 struct tegra_output *output = connector_to_output(connector); in tegra_sor_connector_detect() local
1736 struct tegra_sor *sor = to_sor(output); in tegra_sor_connector_detect()
1772 struct tegra_output *output = connector_to_output(connector); in tegra_sor_connector_get_modes() local
1773 struct tegra_sor *sor = to_sor(output); in tegra_sor_connector_get_modes()
1804 struct tegra_output *output = encoder_to_output(encoder); in tegra_sor_encoder_atomic_check() local
1808 struct tegra_sor *sor = to_sor(output); in tegra_sor_encoder_atomic_check()
1812 info = &output->connector.display_info; in tegra_sor_encoder_atomic_check()
1829 dev_err(output->dev, "failed to setup CRTC state: %d\n", err); in tegra_sor_encoder_atomic_check()
1927 &sor->output.connector, mode); in tegra_sor_hdmi_setup_avi_infoframe()
1952 size_t length = drm_eld_size(sor->output.connector.eld), i; in tegra_sor_write_eld()
1955 tegra_sor_writel(sor, i << 8 | sor->output.connector.eld[i], in tegra_sor_write_eld()
2144 drm_scdc_set_high_tmds_clock_ratio(&sor->output.connector, false); in tegra_sor_hdmi_scdc_disable()
2145 drm_scdc_set_scrambling(&sor->output.connector, false); in tegra_sor_hdmi_scdc_disable()
2170 drm_scdc_set_high_tmds_clock_ratio(&sor->output.connector, true); in tegra_sor_hdmi_scdc_enable()
2171 drm_scdc_set_scrambling(&sor->output.connector, true); in tegra_sor_hdmi_scdc_enable()
2180 if (!drm_scdc_get_scrambling_status(&sor->output.connector)) { in tegra_sor_hdmi_scdc_work()
2190 struct drm_scdc *scdc = &sor->output.connector.display_info.hdmi.scdc; in tegra_sor_hdmi_scdc_start()
2193 mode = &sor->output.encoder.crtc->state->adjusted_mode; in tegra_sor_hdmi_scdc_start()
2204 struct tegra_output *output = encoder_to_output(encoder); in tegra_sor_hdmi_disable() local
2206 struct tegra_sor *sor = to_sor(output); in tegra_sor_hdmi_disable()
2245 struct tegra_output *output = encoder_to_output(encoder); in tegra_sor_hdmi_enable() local
2249 struct tegra_sor *sor = to_sor(output); in tegra_sor_hdmi_enable()
2257 state = to_sor_state(output->connector.state); in tegra_sor_hdmi_enable()
2652 struct tegra_output *output = encoder_to_output(encoder); in tegra_sor_dp_disable() local
2654 struct tegra_sor *sor = to_sor(output); in tegra_sor_dp_disable()
2658 if (output->panel) in tegra_sor_dp_disable()
2659 drm_panel_disable(output->panel); in tegra_sor_dp_disable()
2665 if (output->connector.status != connector_status_disconnected) { in tegra_sor_dp_disable()
2708 if (output->panel) in tegra_sor_dp_disable()
2709 drm_panel_unprepare(output->panel); in tegra_sor_dp_disable()
2716 struct tegra_output *output = encoder_to_output(encoder); in tegra_sor_dp_enable() local
2718 struct tegra_sor *sor = to_sor(output); in tegra_sor_dp_enable()
2727 state = to_sor_state(output->connector.state); in tegra_sor_dp_enable()
2729 info = &output->connector.display_info; in tegra_sor_dp_enable()
2762 if (output->panel) in tegra_sor_dp_enable()
2763 drm_panel_prepare(output->panel); in tegra_sor_dp_enable()
2794 if (output->panel) in tegra_sor_dp_enable()
2805 if (output->panel) in tegra_sor_dp_enable()
2897 if (output->panel) { in tegra_sor_dp_enable()
2930 if (output->panel) in tegra_sor_dp_enable()
2931 drm_panel_enable(output->panel); in tegra_sor_dp_enable()
3056 if (sor->output.panel) { in tegra_sor_init()
3070 sor->output.dev = sor->dev; in tegra_sor_init()
3072 drm_connector_init_with_ddc(drm, &sor->output.connector, in tegra_sor_init()
3075 sor->output.ddc); in tegra_sor_init()
3076 drm_connector_helper_add(&sor->output.connector, in tegra_sor_init()
3078 sor->output.connector.dpms = DRM_MODE_DPMS_OFF; in tegra_sor_init()
3080 drm_simple_encoder_init(drm, &sor->output.encoder, encoder); in tegra_sor_init()
3081 drm_encoder_helper_add(&sor->output.encoder, helpers); in tegra_sor_init()
3083 drm_connector_attach_encoder(&sor->output.connector, in tegra_sor_init()
3084 &sor->output.encoder); in tegra_sor_init()
3085 drm_connector_register(&sor->output.connector); in tegra_sor_init()
3087 err = tegra_output_init(drm, &sor->output); in tegra_sor_init()
3093 tegra_output_find_possible_crtcs(&sor->output, drm); in tegra_sor_init()
3096 err = drm_dp_aux_attach(sor->aux, &sor->output); in tegra_sor_init()
3177 tegra_output_exit(&sor->output); in tegra_sor_exit()
3718 sor->output.dev = sor->dev = &pdev->dev; in tegra_sor_probe()
3738 sor->output.ddc = &sor->aux->ddc; in tegra_sor_probe()
3768 err = tegra_output_probe(&sor->output); in tegra_sor_probe()
3957 sor->output.ddc = NULL; in tegra_sor_probe()
3959 tegra_output_remove(&sor->output); in tegra_sor_probe()
3977 sor->output.ddc = NULL; in tegra_sor_remove()
3980 tegra_output_remove(&sor->output); in tegra_sor_remove()
3988 err = tegra_output_suspend(&sor->output); in tegra_sor_suspend()
3997 tegra_output_resume(&sor->output); in tegra_sor_suspend()
4016 err = tegra_output_resume(&sor->output); in tegra_sor_resume()