Lines Matching refs:tegra_dsi_readl
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() function
219 offset, tegra_dsi_readl(dsi, offset)); in tegra_dsi_show_regs()
459 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_enable()
517 value = tegra_dsi_readl(dsi, DSI_CONTROL); in tegra_dsi_configure()
631 value = tegra_dsi_readl(dsi, DSI_STATUS); in tegra_dsi_wait_idle()
645 value = tegra_dsi_readl(dsi, DSI_CONTROL); in tegra_dsi_video_disable()
736 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_disable()
750 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_soft_reset()
756 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_soft_reset()
762 value = tegra_dsi_readl(dsi, DSI_TRIGGER); in tegra_dsi_soft_reset()
919 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_encoder_enable()
1223 value = tegra_dsi_readl(dsi, DSI_RD_DATA); in tegra_dsi_read_response()
1267 value = tegra_dsi_readl(dsi, DSI_RD_DATA); in tegra_dsi_read_response()
1284 u32 value = tegra_dsi_readl(dsi, DSI_TRIGGER); in tegra_dsi_transmit()
1301 u32 value = tegra_dsi_readl(dsi, DSI_STATUS); in tegra_dsi_wait_for_response()
1352 value = tegra_dsi_readl(dsi, DSI_STATUS); in tegra_dsi_host_transfer()
1359 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_host_transfer()
1386 value = tegra_dsi_readl(dsi, DSI_HOST_CONTROL); in tegra_dsi_host_transfer()
1415 value = tegra_dsi_readl(dsi, DSI_RD_DATA); in tegra_dsi_host_transfer()