51 	link->lanes = 0;  in drm_dp_link_reset()
233 	link->lanes = link->max_lanes;  in drm_dp_link_probe()
346 	values[1] = link->lanes;  in drm_dp_link_configure()
394 	static const unsigned int lanes[3] = { 1, 2, 4 };  in drm_dp_link_choose()  local
402 	for (i = 0; i < ARRAY_SIZE(lanes) && lanes[i] <= link->max_lanes; i++) {  in drm_dp_link_choose()
412 			capacity = lanes[i] * (rates[j] * 10) * 8 / 10;  in drm_dp_link_choose()
416 					      lanes[i], rates[j], requirement,  in drm_dp_link_choose()
418 				link->lanes = lanes[i];  in drm_dp_link_choose()
469 	unsigned int lanes = link->lanes, *vs, *pe, *pc, i;  in drm_dp_link_apply_training()  local
485 	for (i = 0; i < lanes; i++)  in drm_dp_link_apply_training()
489 	err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, lanes);  in drm_dp_link_apply_training()
499 		for (i = 0; i < lanes; i++)  in drm_dp_link_apply_training()
503 					DIV_ROUND_UP(lanes, 2));  in drm_dp_link_apply_training()
562 	for (i = 0; i < link->lanes; i++) {  in drm_dp_link_get_adjustments()
612 	if (!drm_dp_clock_recovery_ok(status, link->lanes))  in drm_dp_link_recover_clock()
662 	if (!drm_dp_clock_recovery_ok(status, link->lanes)) {  in drm_dp_link_equalize_channel()
668 	if (!drm_dp_channel_eq_ok(status, link->lanes))  in drm_dp_link_equalize_channel()
738 		      link->lanes, (link->lanes > 1) ? "s" : "",  in drm_dp_link_train_full()
794 		      link->lanes, (link->lanes > 1) ? "s" : "",  in drm_dp_link_train_fast()
830 	if (!drm_dp_clock_recovery_ok(status, link->lanes)) {  in drm_dp_link_train_fast()
835 	if (!drm_dp_channel_eq_ok(status, link->lanes)) {  in drm_dp_link_train_fast()