Lines Matching refs:VOP_REG

30 #define VOP_REG(off, _mask, _shift) \  macro
84 .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
85 .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
86 .scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
87 .scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
91 .scale_yrgb_x = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 0x0),
92 .scale_yrgb_y = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 16),
100 .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
101 .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
102 .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
103 .act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
104 .dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
105 .dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
106 .yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
107 .uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
108 .yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
109 .uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
110 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
111 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0),
112 .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
120 .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
121 .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
122 .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
123 .act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0),
124 .dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0),
125 .dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0),
126 .yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0),
127 .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
128 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
129 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
130 .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
150 .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
157 .htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
158 .hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
159 .vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
160 .vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
164 .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
169 .out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
170 .dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
171 .dither_down_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 27),
172 .dither_down_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 11),
173 .dither_down_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 10),
191 .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
192 .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
193 .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
194 .dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),
195 .dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),
196 .yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),
197 .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
198 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
199 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
200 .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
233 .line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 0),
241 .out_mode = VOP_REG(PX30_DSP_CTRL2, 0xf, 16),
242 .dsp_blank = VOP_REG(PX30_DSP_CTRL2, 0x1, 14),
243 .dither_down_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 8),
244 .dither_down_sel = VOP_REG(PX30_DSP_CTRL2, 0x1, 7),
245 .dither_down_mode = VOP_REG(PX30_DSP_CTRL2, 0x1, 6),
250 .htotal_pw = VOP_REG(PX30_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
251 .hact_st_end = VOP_REG(PX30_DSP_HACT_ST_END, 0x0fff0fff, 0),
252 .vtotal_pw = VOP_REG(PX30_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
253 .vact_st_end = VOP_REG(PX30_DSP_VACT_ST_END, 0x0fff0fff, 0),
257 .rgb_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 1),
258 .rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 2),
259 .rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0),
260 .mipi_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 25),
261 .mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 26),
262 .mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24),
266 .scale_yrgb_x = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
267 .scale_yrgb_y = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
268 .scale_cbcr_x = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
269 .scale_cbcr_y = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
277 .enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0),
278 .format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1),
279 .rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12),
280 .uv_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 15),
281 .act_info = VOP_REG(PX30_WIN0_ACT_INFO, 0xffffffff, 0),
282 .dsp_info = VOP_REG(PX30_WIN0_DSP_INFO, 0xffffffff, 0),
283 .dsp_st = VOP_REG(PX30_WIN0_DSP_ST, 0xffffffff, 0),
284 .yrgb_mst = VOP_REG(PX30_WIN0_YRGB_MST0, 0xffffffff, 0),
285 .uv_mst = VOP_REG(PX30_WIN0_CBR_MST0, 0xffffffff, 0),
286 .yrgb_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 0),
287 .uv_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 16),
288 .alpha_pre_mul = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 2),
289 .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),
290 .alpha_en = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 0),
297 .enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0),
298 .format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4),
299 .rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12),
300 .uv_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 15),
301 .dsp_info = VOP_REG(PX30_WIN1_DSP_INFO, 0xffffffff, 0),
302 .dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0),
303 .yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0),
304 .yrgb_vir = VOP_REG(PX30_WIN1_VIR, 0x1fff, 0),
305 .alpha_pre_mul = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 2),
306 .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),
307 .alpha_en = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 0),
314 .gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4),
315 .enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0),
316 .format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5),
317 .rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20),
318 .dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0),
319 .dsp_st = VOP_REG(PX30_WIN2_DSP_ST0, 0x1fff1fff, 0),
320 .yrgb_mst = VOP_REG(PX30_WIN2_MST0, 0xffffffff, 0),
321 .yrgb_vir = VOP_REG(PX30_WIN2_VIR0_1, 0x1fff, 0),
322 .alpha_pre_mul = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 2),
323 .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),
324 .alpha_en = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 0),
366 .scale_yrgb_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
367 .scale_yrgb_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
368 .scale_cbcr_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
369 .scale_cbcr_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
377 .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),
378 .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4),
379 .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19),
380 .uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 22),
381 .act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0),
382 .dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0),
383 .dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0),
384 .yrgb_mst = VOP_REG(RK3066_WIN0_YRGB_MST0, 0xffffffff, 0),
385 .uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0),
386 .yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0),
387 .uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16),
388 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),
389 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0),
396 .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),
397 .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7),
398 .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23),
399 .uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 26),
400 .act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0),
401 .dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0),
402 .dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0),
403 .yrgb_mst = VOP_REG(RK3066_WIN1_YRGB_MST, 0xffffffff, 0),
404 .uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0),
405 .yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0),
406 .uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16),
407 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),
408 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1),
415 .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),
416 .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 10),
417 .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 27),
418 .dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0),
419 .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),
420 .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),
421 .yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0),
422 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),
423 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2),
427 .htotal_pw = VOP_REG(RK3066_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
428 .hact_st_end = VOP_REG(RK3066_DSP_HACT_ST_END, 0x1fff1fff, 0),
429 .vtotal_pw = VOP_REG(RK3066_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
430 .vact_st_end = VOP_REG(RK3066_DSP_VACT_ST_END, 0x1fff1fff, 0),
434 .pin_pol = VOP_REG(RK3066_DSP_CTRL0, 0x7, 4),
438 .standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1),
439 .out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0),
440 .cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0),
441 .dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11),
442 .dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10),
443 .dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24),
444 .dither_up = VOP_REG(RK3066_DSP_CTRL0, 0x1, 9),
445 .dsp_lut_en = VOP_REG(RK3066_SYS_CTRL1, 0x1, 31),
446 .data_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 25),
472 .line_flag_num[0] = VOP_REG(RK3066_INT_STATUS, 0xfff, 12),
473 .status = VOP_REG(RK3066_INT_STATUS, 0xf, 0),
474 .enable = VOP_REG(RK3066_INT_STATUS, 0xf, 4),
475 .clear = VOP_REG(RK3066_INT_STATUS, 0xf, 8),
490 .scale_yrgb_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
491 .scale_yrgb_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
492 .scale_cbcr_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
493 .scale_cbcr_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
501 .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0),
502 .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3),
503 .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15),
504 .uv_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 18),
505 .act_info = VOP_REG(RK3188_WIN0_ACT_INFO, 0x1fff1fff, 0),
506 .dsp_info = VOP_REG(RK3188_WIN0_DSP_INFO, 0x0fff0fff, 0),
507 .dsp_st = VOP_REG(RK3188_WIN0_DSP_ST, 0x1fff1fff, 0),
508 .yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0),
509 .uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0),
510 .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0),
511 .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18),
512 .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 0),
513 .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),
520 .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 1),
521 .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 6),
522 .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 19),
524 .dsp_info = VOP_REG(RK3188_WIN1_DSP_INFO, 0x07ff07ff, 0),
525 .dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0),
526 .yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0),
527 .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16),
528 .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 19),
529 .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 1),
530 .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),
534 .htotal_pw = VOP_REG(RK3188_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
535 .hact_st_end = VOP_REG(RK3188_DSP_HACT_ST_END, 0x0fff0fff, 0),
536 .vtotal_pw = VOP_REG(RK3188_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
537 .vact_st_end = VOP_REG(RK3188_DSP_VACT_ST_END, 0x0fff0fff, 0),
541 .pin_pol = VOP_REG(RK3188_DSP_CTRL0, 0xf, 4),
545 .gate_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 31),
546 .standby = VOP_REG(RK3188_SYS_CTRL, 0x1, 30),
547 .out_mode = VOP_REG(RK3188_DSP_CTRL0, 0xf, 0),
548 .cfg_done = VOP_REG(RK3188_REG_CFG_DONE, 0x1, 0),
549 .dither_down_sel = VOP_REG(RK3188_DSP_CTRL0, 0x1, 27),
550 .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11),
551 .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10),
552 .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 24),
553 .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9),
554 .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28),
555 .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25),
579 .line_flag_num[0] = VOP_REG(RK3188_INT_STATUS, 0xfff, 12),
580 .status = VOP_REG(RK3188_INT_STATUS, 0xf, 0),
581 .enable = VOP_REG(RK3188_INT_STATUS, 0xf, 4),
582 .clear = VOP_REG(RK3188_INT_STATUS, 0xf, 8),
597 .cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),
598 .cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),
599 .cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28),
600 .cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26),
601 .cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),
602 .yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23),
603 .yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22),
604 .yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20),
605 .yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18),
606 .yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16),
607 .line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15),
608 .cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12),
609 .yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8),
610 .vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7),
611 .vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6),
612 .vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5),
613 .vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4),
614 .bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2),
615 .cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1),
616 .yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0),
617 .lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),
622 .scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
623 .scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
624 .scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
625 .scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
633 .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
634 .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
635 .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
636 .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
637 .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
638 .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
639 .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
640 .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
641 .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
642 .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
643 .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
644 .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
645 .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
646 .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
653 .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4),
654 .gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
655 .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1),
656 .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12),
657 .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0),
658 .dsp_st = VOP_REG(RK3288_WIN2_DSP_ST0, 0x1fff1fff, 0),
659 .yrgb_mst = VOP_REG(RK3288_WIN2_MST0, 0xffffffff, 0),
660 .yrgb_vir = VOP_REG(RK3288_WIN2_VIR0_1, 0x1fff, 0),
661 .src_alpha_ctl = VOP_REG(RK3288_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
662 .dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0),
666 .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
667 .hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
668 .vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
669 .vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),
670 .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
671 .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
675 .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4),
676 .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
677 .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
678 .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
679 .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
684 .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
685 .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
686 .dither_down_sel = VOP_REG(RK3288_DSP_CTRL1, 0x1, 4),
687 .dither_down_mode = VOP_REG(RK3288_DSP_CTRL1, 0x1, 3),
688 .dither_down_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 2),
689 .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
690 .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
691 .dsp_lut_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 0),
692 .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
693 .dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
694 .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
725 .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
726 .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
727 .enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4),
728 .clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8),
762 .line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
763 .line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
774 .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
775 .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
776 .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
777 .uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15),
778 .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),
779 .y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22),
780 .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0),
781 .dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0),
782 .dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0),
783 .yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0),
784 .uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0),
785 .yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0),
786 .uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16),
787 .src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
788 .dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0),
789 .channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0),
796 .gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),
797 .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
798 .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
799 .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
800 .y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
801 .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
802 .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
803 .yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
804 .yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
805 .src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
806 .dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0),
821 .rgb_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 19),
822 .hdmi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 23),
823 .edp_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 27),
824 .mipi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 31),
825 .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 16),
826 .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 20),
827 .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 24),
828 .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 28),
829 .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
830 .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
831 .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
832 .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
836 .global_regdone_en = VOP_REG(RK3368_SYS_CTRL, 0x1, 11),
854 .line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),
855 .line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),
874 .dp_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 19),
875 .rgb_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 19),
876 .hdmi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 23),
877 .edp_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 27),
878 .mipi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 31),
879 .dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 16),
880 .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 16),
881 .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 20),
882 .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 24),
883 .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 28),
884 .dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
885 .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
886 .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
887 .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
888 .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
889 .mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
894 .gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
895 .mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),
896 .dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),
897 .dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),
898 .dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),
899 .pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
900 .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
901 .dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),
902 .update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),
903 .lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),
904 .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
905 .dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),
906 .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
912 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
913 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 16),
914 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 0),
915 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 16),
916 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 0),
917 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 16),
918 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 0),
919 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 16),
920 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 16, 0xffff, 0),
921 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 20, 0xffffffff, 0),
922 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 24, 0xffffffff, 0),
923 VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 28, 0xffffffff, 0),
931 .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1) },
933 .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 9) },
944 .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
945 .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
946 .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
947 .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
948 .x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),
949 .y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
950 .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
951 .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
952 .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
953 .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
954 .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
955 .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
956 .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
957 .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
958 .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
959 .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
979 .rstn = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 3),
980 .enable = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 0),
981 .win_sel = VOP_REG(RK3399_AFBCD0_CTRL, 0x3, 1),
982 .format = VOP_REG(RK3399_AFBCD0_CTRL, 0x1f, 16),
983 .hreg_block_split = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 21),
984 .hdr_ptr = VOP_REG(RK3399_AFBCD0_HDR_PTR, 0xffffffff, 0),
985 .pic_size = VOP_REG(RK3399_AFBCD0_PIC_SIZE, 0xffffffff, 0),
1013 .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1)},
1052 .htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
1053 .hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),
1054 .vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
1055 .vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),
1056 .hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
1057 .vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
1061 .rgb_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 19),
1062 .hdmi_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 23),
1063 .edp_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 27),
1064 .mipi_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 31),
1065 .rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
1066 .hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
1067 .edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
1068 .mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
1069 .rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 16),
1070 .hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 20),
1071 .edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 24),
1072 .mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 28),
1076 .global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
1081 .dither_down_sel = VOP_REG(RK3328_DSP_CTRL1, 0x1, 4),
1082 .dither_down_mode = VOP_REG(RK3328_DSP_CTRL1, 0x1, 3),
1083 .dither_down_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 2),
1084 .pre_dither_down = VOP_REG(RK3328_DSP_CTRL1, 0x1, 1),
1085 .dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
1086 .dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
1087 .out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),
1094 .line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),
1095 .line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),