drm/rockchip/rockchip_drm_vop2.c

241 static void vop2_writel(struct vop2 *vop2, u32 offset, u32 v)
791 	vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq);
792 	vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq);
799 	vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16);
850 		vop2_writel(vop2, RK3568_OTP_WIN_EN, 1);
852 	vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN);
861 	vop2_writel(vop2, RK3568_SYS0_INT_CLR,
863 	vop2_writel(vop2, RK3568_SYS0_INT_EN,
865 	vop2_writel(vop2, RK3568_SYS1_INT_CLR,
867 	vop2_writel(vop2, RK3568_SYS1_INT_EN,
1502 	vop2_writel(vop2, RK3568_DSP_IF_EN, die);
1503 	vop2_writel(vop2, RK3568_DSP_IF_POL, dip);
1617 	vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id),
1765 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset,
1767 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset,
1769 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL + offset,
1771 	vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL + offset,
1848 		vop2_writel(vop2, RK3568_MIX0_SRC_COLOR_CTRL + offset,
1850 		vop2_writel(vop2, RK3568_MIX0_DST_COLOR_CTRL + offset,
1852 		vop2_writel(vop2, RK3568_MIX0_SRC_ALPHA_CTRL + offset,
1854 		vop2_writel(vop2, RK3568_MIX0_DST_ALPHA_CTRL + offset,
1868 			vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL,
1870 			vop2_writel(vop2, RK3568_HDR0_DST_COLOR_CTRL,
1872 			vop2_writel(vop2, RK3568_HDR0_SRC_ALPHA_CTRL,
1874 			vop2_writel(vop2, RK3568_HDR0_DST_ALPHA_CTRL,
1877 			vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, 0);
1904 	vop2_writel(vop2, RK3568_VP_BG_MIX_CTRL(vp->id),
1910 	vop2_writel(vop2, RK3568_OVL_CTRL, 0);
1982 	vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
1983 	vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
1984 	vop2_writel(vop2, RK3568_OVL_CTRL, RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD);
2023 	vop2_writel(vop2, RK3568_CLUSTER_DLY_NUM, cdly);
2024 	vop2_writel(vop2, RK3568_SMART_DLY_NUM, sdly);
2156 		vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs);
2189 	vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]);
2191 	vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]);