Lines Matching refs:polflags
1433 u32 polflags)
1447 dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags);
1448 if (polflags & POLFLAG_DCLK_INV)
1458 dip |= FIELD_PREP(RK3568_DSP_IF_POL__HDMI_PIN_POL, polflags);
1465 dip |= FIELD_PREP(RK3568_DSP_IF_POL__EDP_PIN_POL, polflags);
1472 dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags);
1479 dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags);
1486 dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags);
1493 dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags);
1535 u32 val, polflags;
1560 polflags = 0;
1562 polflags |= POLFLAG_DCLK_INV;
1564 polflags |= BIT(HSYNC_POSITIVE);
1566 polflags |= BIT(VSYNC_POSITIVE);
1571 rk3568_set_intf_mux(vp, rkencoder->crtc_endpoint_id, polflags);