Lines Matching full:vop2
34 #include <dt-bindings/soc/rockchip,vop2.h>
42 * VOP2 architecture
141 struct vop2 *vop2; member
159 struct vop2 *vop2; member
178 struct vop2 { struct
195 /* physical map length of vop2 register */ argument
230 static void vop2_lock(struct vop2 *vop2) in vop2_lock() argument
232 mutex_lock(&vop2->vop2_lock); in vop2_lock()
235 static void vop2_unlock(struct vop2 *vop2) in vop2_unlock() argument
237 mutex_unlock(&vop2->vop2_lock); in vop2_unlock()
240 static void vop2_writel(struct vop2 *vop2, u32 offset, u32 v) in vop2_writel() argument
242 regmap_write(vop2->map, offset, v); in vop2_writel()
247 regmap_write(vp->vop2->map, vp->data->offset + offset, v); in vop2_vp_write()
250 static u32 vop2_readl(struct vop2 *vop2, u32 offset) in vop2_readl() argument
254 regmap_read(vop2->map, offset, &val); in vop2_readl()
271 struct vop2 *vop2 = vp->vop2; in vop2_cfg_done() local
273 regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE, in vop2_cfg_done()
462 struct vop2 *vop2 = win->vop2; in rockchip_vop2_mod_supported() local
467 if (vop2->data->soc_id == 3568 || vop2->data->soc_id == 3566) { in rockchip_vop2_mod_supported()
470 drm_dbg_kms(vop2->drm, in rockchip_vop2_mod_supported()
481 drm_err(vop2->drm, "Unsupported format modifier 0x%llx\n", in rockchip_vop2_mod_supported()
614 static void vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win, in vop2_setup_scale() argument
656 drm_dbg(vop2->drm, "%s dst_w[%d] should align as 2 pixel\n", in vop2_setup_scale()
798 struct vop2 *vop2 = vp->vop2; in vop2_crtc_enable_irq() local
800 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq); in vop2_crtc_enable_irq()
801 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq); in vop2_crtc_enable_irq()
806 struct vop2 *vop2 = vp->vop2; in vop2_crtc_disable_irq() local
808 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16); in vop2_crtc_disable_irq()
811 static int vop2_core_clks_prepare_enable(struct vop2 *vop2) in vop2_core_clks_prepare_enable() argument
815 ret = clk_prepare_enable(vop2->hclk); in vop2_core_clks_prepare_enable()
817 drm_err(vop2->drm, "failed to enable hclk - %d\n", ret); in vop2_core_clks_prepare_enable()
821 ret = clk_prepare_enable(vop2->aclk); in vop2_core_clks_prepare_enable()
823 drm_err(vop2->drm, "failed to enable aclk - %d\n", ret); in vop2_core_clks_prepare_enable()
829 clk_disable_unprepare(vop2->hclk); in vop2_core_clks_prepare_enable()
834 static void vop2_enable(struct vop2 *vop2) in vop2_enable() argument
838 ret = pm_runtime_resume_and_get(vop2->dev); in vop2_enable()
840 drm_err(vop2->drm, "failed to get pm runtime: %d\n", ret); in vop2_enable()
844 ret = vop2_core_clks_prepare_enable(vop2); in vop2_enable()
846 pm_runtime_put_sync(vop2->dev); in vop2_enable()
850 ret = rockchip_drm_dma_attach_device(vop2->drm, vop2->dev); in vop2_enable()
852 drm_err(vop2->drm, "failed to attach dma mapping, %d\n", ret); in vop2_enable()
856 regcache_sync(vop2->map); in vop2_enable()
858 if (vop2->data->soc_id == 3566) in vop2_enable()
859 vop2_writel(vop2, RK3568_OTP_WIN_EN, 1); in vop2_enable()
861 vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN); in vop2_enable()
867 regmap_clear_bits(vop2->map, RK3568_SYS_AUTO_GATING_CTRL, in vop2_enable()
870 vop2_writel(vop2, RK3568_SYS0_INT_CLR, in vop2_enable()
872 vop2_writel(vop2, RK3568_SYS0_INT_EN, in vop2_enable()
874 vop2_writel(vop2, RK3568_SYS1_INT_CLR, in vop2_enable()
876 vop2_writel(vop2, RK3568_SYS1_INT_EN, in vop2_enable()
880 static void vop2_disable(struct vop2 *vop2) in vop2_disable() argument
882 rockchip_drm_dma_detach_device(vop2->drm, vop2->dev); in vop2_disable()
884 pm_runtime_put_sync(vop2->dev); in vop2_disable()
886 regcache_mark_dirty(vop2->map); in vop2_disable()
888 clk_disable_unprepare(vop2->aclk); in vop2_disable()
889 clk_disable_unprepare(vop2->hclk); in vop2_disable()
896 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_disable() local
900 vop2_lock(vop2); in vop2_crtc_atomic_disable()
923 drm_info(vop2->drm, "wait for vp%d dsp_hold timeout\n", vp->id); in vop2_crtc_atomic_disable()
929 vop2->enable_count--; in vop2_crtc_atomic_disable()
931 if (!vop2->enable_count) in vop2_crtc_atomic_disable()
932 vop2_disable(vop2); in vop2_crtc_atomic_disable()
934 vop2_unlock(vop2); in vop2_crtc_atomic_disable()
953 struct vop2 *vop2; in vop2_plane_atomic_check() local
966 vop2 = vp->vop2; in vop2_plane_atomic_check()
967 vop2_data = vop2->data; in vop2_plane_atomic_check()
988 drm_err(vop2->drm, "Invalid size: %dx%d->%dx%d, min size is 4x4\n", in vop2_plane_atomic_check()
997 drm_err(vop2->drm, "Invalid source: %dx%d. max input: %dx%d\n", in vop2_plane_atomic_check()
1010 drm_err(vop2->drm, "Invalid Source: Yuv format not support odd xpos\n"); in vop2_plane_atomic_check()
1022 struct vop2 *vop2 = win->vop2; in vop2_plane_atomic_disable() local
1024 drm_dbg(vop2->drm, "%s disable\n", win->data->name); in vop2_plane_atomic_disable()
1093 struct vop2 *vop2 = win->vop2; in vop2_plane_atomic_update() local
1118 * can't update plane when vop2 is disabled. in vop2_plane_atomic_update()
1164 drm_err(vop2->drm, "vp%d %s dest->x1[%d] + dsp_w[%d] exceed mode hdisplay[%d]\n", in vop2_plane_atomic_update()
1175 drm_err(vop2->drm, "vp%d %s dest->y1[%d] + dsp_h[%d] exceed mode vdisplay[%d]\n", in vop2_plane_atomic_update()
1189 drm_err(vop2->drm, "vp%d %s act_w[%d] MODE 16 == 1\n", in vop2_plane_atomic_update()
1196 drm_err(vop2->drm, "vp%d %s actual_w[%d] not 4 pixel aligned\n", in vop2_plane_atomic_update()
1206 drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n", in vop2_plane_atomic_update()
1230 drm_err(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n", in vop2_plane_atomic_update()
1303 vop2_setup_scale(vop2, win, actual_w, actual_h, dsp_w, dsp_h, fb->format->format); in vop2_plane_atomic_update()
1416 vop2_writel(vp->vop2, RK3568_VP_BG_MIX_CTRL(vp->id), in vop2_post_config()
1459 struct vop2 *vop2 = vp->vop2; in rk3568_set_intf_mux() local
1462 die = vop2_readl(vop2, RK3568_DSP_IF_EN); in rk3568_set_intf_mux()
1463 dip = vop2_readl(vop2, RK3568_DSP_IF_POL); in rk3568_set_intf_mux()
1473 regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16) | BIT(3)); in rk3568_set_intf_mux()
1475 regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16)); in rk3568_set_intf_mux()
1520 drm_err(vop2->drm, "Invalid interface id %d on vp%d\n", id, vp->id); in rk3568_set_intf_mux()
1526 vop2_writel(vop2, RK3568_DSP_IF_EN, die); in rk3568_set_intf_mux()
1527 vop2_writel(vop2, RK3568_DSP_IF_POL, dip); in rk3568_set_intf_mux()
1539 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_enable() local
1540 const struct vop2_data *vop2_data = vop2->data; in vop2_crtc_atomic_enable()
1563 drm_dbg(vop2->drm, "Update mode to %dx%d%s%d, type: %d for vp%d\n", in vop2_crtc_atomic_enable()
1567 vop2_lock(vop2); in vop2_crtc_atomic_enable()
1571 drm_err(vop2->drm, "failed to enable dclk for video port%d - %d\n", in vop2_crtc_atomic_enable()
1573 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1577 if (!vop2->enable_count) in vop2_crtc_atomic_enable()
1578 vop2_enable(vop2); in vop2_crtc_atomic_enable()
1580 vop2->enable_count++; in vop2_crtc_atomic_enable()
1643 vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id), in vop2_crtc_atomic_enable()
1665 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1749 static int vop2_find_start_mixer_id_for_vp(struct vop2 *vop2, u8 port_id) in vop2_find_start_mixer_id_for_vp() argument
1756 vp = &vop2->vps[i]; in vop2_find_start_mixer_id_for_vp()
1763 static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_win) in vop2_setup_cluster_alpha() argument
1807 vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset, in vop2_setup_cluster_alpha()
1809 vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset, in vop2_setup_cluster_alpha()
1811 vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL + offset, in vop2_setup_cluster_alpha()
1813 vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL + offset, in vop2_setup_cluster_alpha()
1819 struct vop2 *vop2 = vp->vop2; in vop2_setup_alpha() local
1831 mixer_id = vop2_find_start_mixer_id_for_vp(vop2, vp->id); in vop2_setup_alpha()
1896 vop2_writel(vop2, RK3568_MIX0_SRC_COLOR_CTRL + offset, in vop2_setup_alpha()
1898 vop2_writel(vop2, RK3568_MIX0_DST_COLOR_CTRL + offset, in vop2_setup_alpha()
1900 vop2_writel(vop2, RK3568_MIX0_SRC_ALPHA_CTRL + offset, in vop2_setup_alpha()
1902 vop2_writel(vop2, RK3568_MIX0_DST_ALPHA_CTRL + offset, in vop2_setup_alpha()
1916 vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, in vop2_setup_alpha()
1918 vop2_writel(vop2, RK3568_HDR0_DST_COLOR_CTRL, in vop2_setup_alpha()
1920 vop2_writel(vop2, RK3568_HDR0_SRC_ALPHA_CTRL, in vop2_setup_alpha()
1922 vop2_writel(vop2, RK3568_HDR0_DST_ALPHA_CTRL, in vop2_setup_alpha()
1925 vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, 0); in vop2_setup_alpha()
1932 struct vop2 *vop2 = vp->vop2; in vop2_setup_layer_mixer() local
1942 struct vop2_video_port *vp0 = &vop2->vps[0]; in vop2_setup_layer_mixer()
1943 struct vop2_video_port *vp1 = &vop2->vps[1]; in vop2_setup_layer_mixer()
1944 struct vop2_video_port *vp2 = &vop2->vps[2]; in vop2_setup_layer_mixer()
1947 ovl_ctrl = vop2_readl(vop2, RK3568_OVL_CTRL); in vop2_setup_layer_mixer()
1954 vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl); in vop2_setup_layer_mixer()
1956 port_sel = vop2_readl(vop2, RK3568_OVL_PORT_SEL); in vop2_setup_layer_mixer()
1977 layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL); in vop2_setup_layer_mixer()
1981 ofs += vop2->vps[i].nlayers; in vop2_setup_layer_mixer()
1992 for (old_layer_id = 0; old_layer_id < vop2->data->win_size; old_layer_id++) { in vop2_setup_layer_mixer()
2001 for (i = 0; i < vop2->data->win_size; i++) { in vop2_setup_layer_mixer()
2002 old_win = &vop2->win[i]; in vop2_setup_layer_mixer()
2045 vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel); in vop2_setup_layer_mixer()
2046 vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel); in vop2_setup_layer_mixer()
2049 static void vop2_setup_dly_for_windows(struct vop2 *vop2) in vop2_setup_dly_for_windows() argument
2055 for (i = 0; i < vop2->data->win_size; i++) { in vop2_setup_dly_for_windows()
2058 win = &vop2->win[i]; in vop2_setup_dly_for_windows()
2085 vop2_writel(vop2, RK3568_CLUSTER_DLY_NUM, cdly); in vop2_setup_dly_for_windows()
2086 vop2_writel(vop2, RK3568_SMART_DLY_NUM, sdly); in vop2_setup_dly_for_windows()
2093 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_begin() local
2106 vop2_setup_cluster_alpha(vop2, win); in vop2_crtc_atomic_begin()
2114 vop2_setup_dly_for_windows(vop2); in vop2_crtc_atomic_begin()
2199 struct vop2 *vop2 = data; in vop2_isr() local
2200 const struct vop2_data *vop2_data = vop2->data; in vop2_isr()
2207 * vop2-device is disabled the irq has to be targeted at the iommu. in vop2_isr()
2209 if (!pm_runtime_get_if_in_use(vop2->dev)) in vop2_isr()
2213 struct vop2_video_port *vp = &vop2->vps[i]; in vop2_isr()
2217 irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id)); in vop2_isr()
2218 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs); in vop2_isr()
2229 u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE); in vop2_isr()
2243 drm_err_ratelimited(vop2->drm, in vop2_isr()
2250 axi_irqs[0] = vop2_readl(vop2, RK3568_SYS0_INT_STATUS); in vop2_isr()
2251 vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]); in vop2_isr()
2252 axi_irqs[1] = vop2_readl(vop2, RK3568_SYS1_INT_STATUS); in vop2_isr()
2253 vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]); in vop2_isr()
2257 drm_err_ratelimited(vop2->drm, "BUS_ERROR irq err\n"); in vop2_isr()
2262 pm_runtime_put(vop2->dev); in vop2_isr()
2267 static int vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, in vop2_plane_init() argument
2276 ret = drm_universal_plane_init(vop2->drm, &win->base, possible_crtcs, in vop2_plane_init()
2282 drm_err(vop2->drm, "failed to initialize plane %d\n", ret); in vop2_plane_init()
2295 vop2->registered_num_wins - 1); in vop2_plane_init()
2300 static struct vop2_video_port *find_vp_without_primary(struct vop2 *vop2) in find_vp_without_primary() argument
2304 for (i = 0; i < vop2->data->nr_vps; i++) { in find_vp_without_primary()
2305 struct vop2_video_port *vp = &vop2->vps[i]; in find_vp_without_primary()
2320 static int vop2_create_crtcs(struct vop2 *vop2) in vop2_create_crtcs() argument
2322 const struct vop2_data *vop2_data = vop2->data; in vop2_create_crtcs()
2323 struct drm_device *drm = vop2->drm; in vop2_create_crtcs()
2324 struct device *dev = vop2->dev; in vop2_create_crtcs()
2337 vp = &vop2->vps[i]; in vop2_create_crtcs()
2338 vp->vop2 = vop2; in vop2_create_crtcs()
2344 vp->dclk = devm_clk_get(vop2->dev, dclk_name); in vop2_create_crtcs()
2346 drm_err(vop2->drm, "failed to get %s\n", dclk_name); in vop2_create_crtcs()
2352 drm_dbg(vop2->drm, "%s: No remote for vp%d\n", __func__, i); in vop2_create_crtcs()
2359 drm_err(vop2->drm, "no port node found for video_port%d\n", i); in vop2_create_crtcs()
2368 for (i = 0; i < vop2->registered_num_wins; i++) { in vop2_create_crtcs()
2369 struct vop2_win *win = &vop2->win[i]; in vop2_create_crtcs()
2372 if (vop2->data->soc_id == 3566) { in vop2_create_crtcs()
2387 vp = find_vp_without_primary(vop2); in vop2_create_crtcs()
2401 ret = vop2_plane_init(vop2, win, possible_crtcs); in vop2_create_crtcs()
2403 drm_err(vop2->drm, "failed to init plane %s: %d\n", in vop2_create_crtcs()
2410 vp = &vop2->vps[i]; in vop2_create_crtcs()
2421 drm_err(vop2->drm, "crtc init for video_port%d failed\n", i); in vop2_create_crtcs()
2431 * On the VOP2 it's very hard to change the number of layers on a VP in vop2_create_crtcs()
2435 for (i = 0; i < vop2->data->nr_vps; i++) { in vop2_create_crtcs()
2436 struct vop2_video_port *vp = &vop2->vps[i]; in vop2_create_crtcs()
2445 static void vop2_destroy_crtcs(struct vop2 *vop2) in vop2_destroy_crtcs() argument
2447 struct drm_device *drm = vop2->drm; in vop2_destroy_crtcs()
2466 static int vop2_find_rgb_encoder(struct vop2 *vop2) in vop2_find_rgb_encoder() argument
2468 struct device_node *node = vop2->dev->of_node; in vop2_find_rgb_encoder()
2472 for (i = 0; i < vop2->data->nr_vps; i++) { in vop2_find_rgb_encoder()
2551 struct vop2 *vop2 = win->vop2; in vop2_cluster_init() local
2564 ret = devm_regmap_field_bulk_alloc(vop2->dev, vop2->map, win->reg, in vop2_cluster_init()
2635 struct vop2 *vop2 = win->vop2; in vop2_esmart_init() local
2648 ret = devm_regmap_field_bulk_alloc(vop2->dev, vop2->map, win->reg, in vop2_esmart_init()
2657 static int vop2_win_init(struct vop2 *vop2) in vop2_win_init() argument
2659 const struct vop2_data *vop2_data = vop2->data; in vop2_win_init()
2666 win = &vop2->win[i]; in vop2_win_init()
2671 win->vop2 = vop2; in vop2_win_init()
2680 vop2->registered_num_wins = vop2_data->win_size; in vop2_win_init()
2705 .name = "vop2",
2715 struct vop2 *vop2; in vop2_bind() local
2724 /* Allocate vop2 struct and its vop2_win array */ in vop2_bind()
2725 alloc_size = struct_size(vop2, win, vop2_data->win_size); in vop2_bind()
2726 vop2 = devm_kzalloc(dev, alloc_size, GFP_KERNEL); in vop2_bind()
2727 if (!vop2) in vop2_bind()
2730 vop2->dev = dev; in vop2_bind()
2731 vop2->data = vop2_data; in vop2_bind()
2732 vop2->drm = drm; in vop2_bind()
2734 dev_set_drvdata(dev, vop2); in vop2_bind()
2738 drm_err(vop2->drm, "failed to get vop2 register byname\n"); in vop2_bind()
2742 vop2->regs = devm_ioremap_resource(dev, res); in vop2_bind()
2743 if (IS_ERR(vop2->regs)) in vop2_bind()
2744 return PTR_ERR(vop2->regs); in vop2_bind()
2745 vop2->len = resource_size(res); in vop2_bind()
2747 vop2->map = devm_regmap_init_mmio(dev, vop2->regs, &vop2_regmap_config); in vop2_bind()
2748 if (IS_ERR(vop2->map)) in vop2_bind()
2749 return PTR_ERR(vop2->map); in vop2_bind()
2751 ret = vop2_win_init(vop2); in vop2_bind()
2757 vop2->lut_regs = devm_ioremap_resource(dev, res); in vop2_bind()
2758 if (IS_ERR(vop2->lut_regs)) in vop2_bind()
2759 return PTR_ERR(vop2->lut_regs); in vop2_bind()
2762 vop2->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); in vop2_bind()
2764 vop2->hclk = devm_clk_get(vop2->dev, "hclk"); in vop2_bind()
2765 if (IS_ERR(vop2->hclk)) { in vop2_bind()
2766 drm_err(vop2->drm, "failed to get hclk source\n"); in vop2_bind()
2767 return PTR_ERR(vop2->hclk); in vop2_bind()
2770 vop2->aclk = devm_clk_get(vop2->dev, "aclk"); in vop2_bind()
2771 if (IS_ERR(vop2->aclk)) { in vop2_bind()
2772 drm_err(vop2->drm, "failed to get aclk source\n"); in vop2_bind()
2773 return PTR_ERR(vop2->aclk); in vop2_bind()
2776 vop2->irq = platform_get_irq(pdev, 0); in vop2_bind()
2777 if (vop2->irq < 0) { in vop2_bind()
2778 drm_err(vop2->drm, "cannot find irq for vop2\n"); in vop2_bind()
2779 return vop2->irq; in vop2_bind()
2782 mutex_init(&vop2->vop2_lock); in vop2_bind()
2784 ret = devm_request_irq(dev, vop2->irq, vop2_isr, IRQF_SHARED, dev_name(dev), vop2); in vop2_bind()
2788 ret = vop2_create_crtcs(vop2); in vop2_bind()
2792 ret = vop2_find_rgb_encoder(vop2); in vop2_bind()
2794 vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc, in vop2_bind()
2795 vop2->drm, ret); in vop2_bind()
2796 if (IS_ERR(vop2->rgb)) { in vop2_bind()
2797 if (PTR_ERR(vop2->rgb) == -EPROBE_DEFER) { in vop2_bind()
2798 ret = PTR_ERR(vop2->rgb); in vop2_bind()
2801 vop2->rgb = NULL; in vop2_bind()
2805 rockchip_drm_dma_init_device(vop2->drm, vop2->dev); in vop2_bind()
2812 vop2_destroy_crtcs(vop2); in vop2_bind()
2819 struct vop2 *vop2 = dev_get_drvdata(dev); in vop2_unbind() local
2823 if (vop2->rgb) in vop2_unbind()
2824 rockchip_rgb_fini(vop2->rgb); in vop2_unbind()
2826 vop2_destroy_crtcs(vop2); in vop2_unbind()