Lines Matching refs:dfixed_mul

2082 	bandwidth.full = dfixed_mul(dram_channels, yclk);  in dce6_dram_bandwidth()
2083 	bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);  in dce6_dram_bandwidth()
2102 	bandwidth.full = dfixed_mul(dram_channels, yclk);  in dce6_dram_bandwidth_for_display()
2103 	bandwidth.full = dfixed_mul(bandwidth, disp_dram_allocation);  in dce6_dram_bandwidth_for_display()
2122 	bandwidth.full = dfixed_mul(a, sclk);  in dce6_data_return_bandwidth()
2123 	bandwidth.full = dfixed_mul(bandwidth, return_efficiency);  in dce6_data_return_bandwidth()
2145 	b1.full = dfixed_mul(a, disp_clk);  in dce6_dmif_request_bandwidth()
2151 	b2.full = dfixed_mul(a, sclk);  in dce6_dmif_request_bandwidth()
2160 	bandwidth.full = dfixed_mul(a, disp_clk_request_efficiency);  in dce6_dmif_request_bandwidth()
2192 	bandwidth.full = dfixed_mul(src_width, bpp);  in dce6_average_bandwidth()
2193 	bandwidth.full = dfixed_mul(bandwidth, wm->vsc);  in dce6_average_bandwidth()
2405 		c.full = dfixed_mul(c, b);  in dce6_program_watermarks()
2406 		c.full = dfixed_mul(c, radeon_crtc->hsc);  in dce6_program_watermarks()
2417 		c.full = dfixed_mul(c, b);  in dce6_program_watermarks()
2418 		c.full = dfixed_mul(c, radeon_crtc->hsc);  in dce6_program_watermarks()