1 // SPDX-License-Identifier: MIT
16 #define MAX_H_POSITION 5 /* Range: [-5..5], negative is on the left, 0 is default, positive is on t…
17 #define MAX_V_POSITION 5 /* Range: [-5..5], negative is up, 0 is default, positive is down */
25  * Indexes in h. code timing table for horizontal line position adjustment
33 #define MAX_H_SIZE 5 /* Range: [-5..5], negative is smaller, positive is larger */
172 	{   /* NTSC timing for 27 Mhz ref clk */
187 	{   /* PAL timing for 27 Mhz ref clk */
202 	{   /* NTSC timing for 14 Mhz ref clk */
217 	{ /* PAL timing for 14 Mhz ref clk */
239 	struct drm_device *dev = radeon_encoder->base.dev;  in radeon_legacy_tv_get_std_mode()
240 	struct radeon_device *rdev = dev->dev_private;  in radeon_legacy_tv_get_std_mode()
242 	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;  in radeon_legacy_tv_get_std_mode()
246 	radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc);  in radeon_legacy_tv_get_std_mode()
247 	if (radeon_crtc->crtc_id == 1)  in radeon_legacy_tv_get_std_mode()
248 		pll = &rdev->clock.p2pll;  in radeon_legacy_tv_get_std_mode()
250 		pll = &rdev->clock.p1pll;  in radeon_legacy_tv_get_std_mode()
253 		*pll_ref_freq = pll->reference_freq;  in radeon_legacy_tv_get_std_mode()
255 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_get_std_mode()
256 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_get_std_mode()
257 	    tv_dac->tv_std == TV_STD_PAL_M) {  in radeon_legacy_tv_get_std_mode()
258 		if (pll->reference_freq == 2700)  in radeon_legacy_tv_get_std_mode()
263 		if (pll->reference_freq == 2700)  in radeon_legacy_tv_get_std_mode()
279 	struct drm_device *dev = encoder->dev;  in radeon_wait_pll_lock()
280 	struct radeon_device *rdev = dev->dev_private;  in radeon_wait_pll_lock()
303 	struct drm_device *dev = radeon_encoder->base.dev;  in radeon_legacy_tv_write_fifo()
304 	struct radeon_device *rdev = dev->dev_private;  in radeon_legacy_tv_write_fifo()
325 	struct drm_device *dev = radeon_encoder->base.dev;
326 	struct radeon_device *rdev = dev->dev_private;
388 	struct drm_device *dev = radeon_encoder->base.dev;  in radeon_restore_tv_timing_tables()
389 	struct radeon_device *rdev = dev->dev_private;  in radeon_restore_tv_timing_tables()
390 	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;  in radeon_restore_tv_timing_tables()
395 	WREG32(RADEON_TV_UV_ADR, tv_dac->tv.tv_uv_adr);  in radeon_restore_tv_timing_tables()
396 	h_table = radeon_get_htiming_tables_addr(tv_dac->tv.tv_uv_adr);  in radeon_restore_tv_timing_tables()
397 	v_table = radeon_get_vtiming_tables_addr(tv_dac->tv.tv_uv_adr);  in radeon_restore_tv_timing_tables()
399 	for (i = 0; i < MAX_H_CODE_TIMING_LEN; i += 2, h_table--) {  in radeon_restore_tv_timing_tables()
400 		tmp = ((uint32_t)tv_dac->tv.h_code_timing[i] << 14) | ((uint32_t)tv_dac->tv.h_code_timing[i+1]);  in radeon_restore_tv_timing_tables()
402 		if (tv_dac->tv.h_code_timing[i] == 0 || tv_dac->tv.h_code_timing[i + 1] == 0)  in radeon_restore_tv_timing_tables()
406 		tmp = ((uint32_t)tv_dac->tv.v_code_timing[i+1] << 14) | ((uint32_t)tv_dac->tv.v_code_timing[i]);  in radeon_restore_tv_timing_tables()
408 		if (tv_dac->tv.v_code_timing[i] == 0 || tv_dac->tv.v_code_timing[i + 1] == 0)  in radeon_restore_tv_timing_tables()
415 	struct drm_device *dev = radeon_encoder->base.dev;  in radeon_legacy_write_tv_restarts()
416 	struct radeon_device *rdev = dev->dev_private;  in radeon_legacy_write_tv_restarts()
417 	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;  in radeon_legacy_write_tv_restarts()
418 	WREG32(RADEON_TV_FRESTART, tv_dac->tv.frestart);  in radeon_legacy_write_tv_restarts()
419 	WREG32(RADEON_TV_HRESTART, tv_dac->tv.hrestart);  in radeon_legacy_write_tv_restarts()
420 	WREG32(RADEON_TV_VRESTART, tv_dac->tv.vrestart);  in radeon_legacy_write_tv_restarts()
426 	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;  in radeon_legacy_tv_init_restarts()
438 	h_total = const_ptr->hor_total;  in radeon_legacy_tv_init_restarts()
439 	v_total = const_ptr->ver_total;  in radeon_legacy_tv_init_restarts()
441 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_init_restarts()
442 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_init_restarts()
443 	    tv_dac->tv_std == TV_STD_PAL_M ||  in radeon_legacy_tv_init_restarts()
444 	    tv_dac->tv_std == TV_STD_PAL_60)  in radeon_legacy_tv_init_restarts()
449 	/* adjust positions 1&2 in hor. cod timing table */  in radeon_legacy_tv_init_restarts()
450 	h_offset = tv_dac->h_pos * H_POS_UNIT;  in radeon_legacy_tv_init_restarts()
452 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_init_restarts()
453 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_init_restarts()
454 	    tv_dac->tv_std == TV_STD_PAL_M) {  in radeon_legacy_tv_init_restarts()
455 		h_offset -= 50;  in radeon_legacy_tv_init_restarts()
464 	p2 = (u16)((int)p2 - h_offset);  in radeon_legacy_tv_init_restarts()
466 	h_changed = (p1 != tv_dac->tv.h_code_timing[H_TABLE_POS1] ||  in radeon_legacy_tv_init_restarts()
467 		     p2 != tv_dac->tv.h_code_timing[H_TABLE_POS2]);  in radeon_legacy_tv_init_restarts()
469 	tv_dac->tv.h_code_timing[H_TABLE_POS1] = p1;  in radeon_legacy_tv_init_restarts()
470 	tv_dac->tv.h_code_timing[H_TABLE_POS2] = p2;  in radeon_legacy_tv_init_restarts()
473 	h_offset = (h_offset * (int)(const_ptr->pix_to_tv)) / 1000;  in radeon_legacy_tv_init_restarts()
476 	restart = const_ptr->def_restart;  in radeon_legacy_tv_init_restarts()
481 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_init_restarts()
482 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_init_restarts()
483 	    tv_dac->tv_std == TV_STD_PAL_M ||  in radeon_legacy_tv_init_restarts()
484 	    tv_dac->tv_std == TV_STD_PAL_60)  in radeon_legacy_tv_init_restarts()
485 		v_offset = ((int)(v_total * h_total) * 2 * tv_dac->v_pos) / (int)(NTSC_TV_LINES_PER_FRAME);  in radeon_legacy_tv_init_restarts()
487 		v_offset = ((int)(v_total * h_total) * 2 * tv_dac->v_pos) / (int)(PAL_TV_LINES_PER_FRAME);  in radeon_legacy_tv_init_restarts()
489 	restart -= v_offset + h_offset;  in radeon_legacy_tv_init_restarts()
492 		  const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart);  in radeon_legacy_tv_init_restarts()
494 	tv_dac->tv.hrestart = restart % h_total;  in radeon_legacy_tv_init_restarts()
496 	tv_dac->tv.vrestart = restart % v_total;  in radeon_legacy_tv_init_restarts()
498 	tv_dac->tv.frestart = restart % f_total;  in radeon_legacy_tv_init_restarts()
501 		  (unsigned)tv_dac->tv.frestart,  in radeon_legacy_tv_init_restarts()
502 		  (unsigned)tv_dac->tv.vrestart,  in radeon_legacy_tv_init_restarts()
503 		  (unsigned)tv_dac->tv.hrestart);  in radeon_legacy_tv_init_restarts()
506 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_init_restarts()
507 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_init_restarts()
508 	    tv_dac->tv_std == TV_STD_PAL_M)  in radeon_legacy_tv_init_restarts()
509 		h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * NTSC_TV_CLOCK_T) /  in radeon_legacy_tv_init_restarts()
510 			      (tv_dac->h_size * (int)(NTSC_TV_H_SIZE_UNIT) + (int)(NTSC_TV_ZERO_H_SIZE)));  in radeon_legacy_tv_init_restarts()
512 		h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * PAL_TV_CLOCK_T) /  in radeon_legacy_tv_init_restarts()
513 			      (tv_dac->h_size * (int)(PAL_TV_H_SIZE_UNIT) + (int)(PAL_TV_ZERO_H_SIZE)));  in radeon_legacy_tv_init_restarts()
515 	tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) |  in radeon_legacy_tv_init_restarts()
518 	DRM_DEBUG_KMS("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc);  in radeon_legacy_tv_init_restarts()
527 	struct drm_device *dev = encoder->dev;  in radeon_legacy_tv_mode_set()
528 	struct radeon_device *rdev = dev->dev_private;  in radeon_legacy_tv_mode_set()
530 	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;  in radeon_legacy_tv_mode_set()
549 	radeon_crtc = to_radeon_crtc(encoder->crtc);  in radeon_legacy_tv_mode_set()
559 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
560 	    tv_dac->tv_std == TV_STD_NTSC_J)  in radeon_legacy_tv_mode_set()
569 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
570 	    tv_dac->tv_std == TV_STD_NTSC_J) {  in radeon_legacy_tv_mode_set()
573 		tv_modulator_cntl2 = (-111 & RADEON_TV_U_BURST_LEVEL_MASK) |  in radeon_legacy_tv_mode_set()
575 	} else if (tv_dac->tv_std == TV_STD_SCART_PAL) {  in radeon_legacy_tv_mode_set()
583 		tv_modulator_cntl2 = (-78 & RADEON_TV_U_BURST_LEVEL_MASK) |  in radeon_legacy_tv_mode_set()
595 	if (radeon_crtc->crtc_id == 1)  in radeon_legacy_tv_mode_set()
598 		if (radeon_crtc->rmx_type != RMX_OFF)  in radeon_legacy_tv_mode_set()
604 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
605 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_mode_set()
606 	    tv_dac->tv_std == TV_STD_PAL_M ||  in radeon_legacy_tv_mode_set()
607 	    tv_dac->tv_std == TV_STD_PAL_60)  in radeon_legacy_tv_mode_set()
608 		vert_space = const_ptr->ver_total * 2 * 10000 / NTSC_TV_LINES_PER_FRAME;  in radeon_legacy_tv_mode_set()
610 		vert_space = const_ptr->ver_total * 2 * 10000 / PAL_TV_LINES_PER_FRAME;  in radeon_legacy_tv_mode_set()
620 	if (const_ptr->hor_resolution == 1024)  in radeon_legacy_tv_mode_set()
626 	tmp = const_ptr->ver_total * 2 * 1000;  in radeon_legacy_tv_mode_set()
627 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
628 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_mode_set()
629 	    tv_dac->tv_std == TV_STD_PAL_M ||  in radeon_legacy_tv_mode_set()
630 	    tv_dac->tv_std == TV_STD_PAL_60) {  in radeon_legacy_tv_mode_set()
644 	tv_y_saw_tooth_cntl = (vert_space * SLOPE_value[i] * (1 << (FRAC_BITS - 1)) +  in radeon_legacy_tv_mode_set()
646 				(1 << (FRAC_BITS - 1)) / 8) << 16);  in radeon_legacy_tv_mode_set()
649 		RADEON_Y_FALL_PING_PONG | (272 * SLOPE_value[i] / 8) * (1 << (FRAC_BITS - 1)) /  in radeon_legacy_tv_mode_set()
652 		(flicker_removal * 1024 - 272) * SLOPE_value[i] / 8 * (1 << (FRAC_BITS - 1)) / 1024;  in radeon_legacy_tv_mode_set()
664 	tv_dac->tv.timing_cntl = tmp;  in radeon_legacy_tv_mode_set()
666 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
667 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_mode_set()
668 	    tv_dac->tv_std == TV_STD_PAL_M ||  in radeon_legacy_tv_mode_set()
669 	    tv_dac->tv_std == TV_STD_PAL_60)  in radeon_legacy_tv_mode_set()
670 		tv_dac_cntl = tv_dac->ntsc_tvdac_adj;  in radeon_legacy_tv_mode_set()
672 		tv_dac_cntl = tv_dac->pal_tvdac_adj;  in radeon_legacy_tv_mode_set()
676 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
677 	    tv_dac->tv_std == TV_STD_NTSC_J)  in radeon_legacy_tv_mode_set()
682 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
683 	    tv_dac->tv_std == TV_STD_NTSC_J) {  in radeon_legacy_tv_mode_set()
711 	tv_dac->tv.tv_uv_adr = 0xc8;  in radeon_legacy_tv_mode_set()
713 	if (tv_dac->tv_std == TV_STD_NTSC ||  in radeon_legacy_tv_mode_set()
714 	    tv_dac->tv_std == TV_STD_NTSC_J ||  in radeon_legacy_tv_mode_set()
715 	    tv_dac->tv_std == TV_STD_PAL_M ||  in radeon_legacy_tv_mode_set()
716 	    tv_dac->tv_std == TV_STD_PAL_60) {  in radeon_legacy_tv_mode_set()
727 		tv_dac->tv.h_code_timing[i] = hor_timing[i];  in radeon_legacy_tv_mode_set()
728 		if (tv_dac->tv.h_code_timing[i] == 0)  in radeon_legacy_tv_mode_set()
733 		tv_dac->tv.v_code_timing[i] = vert_timing[i];  in radeon_legacy_tv_mode_set()
734 		if (tv_dac->tv.v_code_timing[i] == 0)  in radeon_legacy_tv_mode_set()
777 	WREG32(RADEON_TV_HTOTAL, const_ptr->hor_total - 1);  in radeon_legacy_tv_mode_set()
778 	WREG32(RADEON_TV_HDISP, const_ptr->hor_resolution - 1);  in radeon_legacy_tv_mode_set()
779 	WREG32(RADEON_TV_HSTART, const_ptr->hor_start);  in radeon_legacy_tv_mode_set()
781 	WREG32(RADEON_TV_VTOTAL, const_ptr->ver_total - 1);  in radeon_legacy_tv_mode_set()
782 	WREG32(RADEON_TV_VDISP, const_ptr->ver_resolution - 1);  in radeon_legacy_tv_mode_set()
804 	WREG32(RADEON_TV_TIMING_CNTL, tv_dac->tv.timing_cntl);  in radeon_legacy_tv_mode_set()
837 	*h_total_disp = (((const_ptr->hor_resolution / 8) - 1) << RADEON_CRTC_H_DISP_SHIFT) |  in radeon_legacy_tv_adjust_crtc_reg()
838 		(((const_ptr->hor_total / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT);  in radeon_legacy_tv_adjust_crtc_reg()
842 	tmp |= (((const_ptr->hor_syncstart / 8) - 1) << RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT) |  in radeon_legacy_tv_adjust_crtc_reg()
843 		(const_ptr->hor_syncstart & 7);  in radeon_legacy_tv_adjust_crtc_reg()
846 	*v_total_disp = ((const_ptr->ver_resolution - 1) << RADEON_CRTC_V_DISP_SHIFT) |  in radeon_legacy_tv_adjust_crtc_reg()
847 		((const_ptr->ver_total - 1) << RADEON_CRTC_V_TOTAL_SHIFT);  in radeon_legacy_tv_adjust_crtc_reg()
851 	tmp |= ((const_ptr->ver_syncstart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);  in radeon_legacy_tv_adjust_crtc_reg()
883 	*htotal_cntl = (const_ptr->hor_total & 0x7) | RADEON_HTOT_CNTL_VGA_EN;  in radeon_legacy_tv_adjust_pll1()
885 	*ppll_ref_div = const_ptr->crtcPLL_M;  in radeon_legacy_tv_adjust_pll1()
887 	*ppll_div_3 = (const_ptr->crtcPLL_N & 0x7ff) | (get_post_div(const_ptr->crtcPLL_post_div) << 16);  in radeon_legacy_tv_adjust_pll1()
903 	*htotal2_cntl = (const_ptr->hor_total & 0x7);  in radeon_legacy_tv_adjust_pll2()
905 	*p2pll_ref_div = const_ptr->crtcPLL_M;  in radeon_legacy_tv_adjust_pll2()
907 	*p2pll_div_0 = (const_ptr->crtcPLL_N & 0x7ff) | (get_post_div(const_ptr->crtcPLL_post_div) << 16);  in radeon_legacy_tv_adjust_pll2()