305 	spin_lock_irqsave(&rdev_to_drm(rdev)->event_lock, flags);  in radeon_crtc_handle_vblank()
311 		spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);  in radeon_crtc_handle_vblank()
337 	     radeon_get_crtc_scanoutpos(rdev_to_drm(rdev), crtc_id,  in radeon_crtc_handle_vblank()
350 	spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);  in radeon_crtc_handle_vblank()
373 	spin_lock_irqsave(&rdev_to_drm(rdev)->event_lock, flags);  in radeon_crtc_handle_flip()
380 		spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);  in radeon_crtc_handle_flip()
392 	spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags);  in radeon_crtc_handle_flip()
411 	struct drm_device *dev = rdev_to_drm(rdev);  in radeon_flip_work_func()
1404 			drm_property_create_range(rdev_to_drm(rdev), 0, "coherent", 0, 1);  in radeon_modeset_create_props()
1412 			drm_property_create_enum(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1418 		drm_property_create_range(rdev_to_drm(rdev), 0, "load detection", 0, 1);  in radeon_modeset_create_props()
1422 	drm_mode_create_scaling_mode_property(rdev_to_drm(rdev));  in radeon_modeset_create_props()
1426 		drm_property_create_enum(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1432 		drm_property_create_enum(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1437 		drm_property_create_range(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1443 		drm_property_create_range(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1450 		drm_property_create_enum(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1456 		drm_property_create_enum(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1462 		drm_property_create_enum(rdev_to_drm(rdev), 0,  in radeon_modeset_create_props()
1581 	drm_mode_config_init(rdev_to_drm(rdev));  in radeon_modeset_init()
1584 	rdev_to_drm(rdev)->mode_config.funcs = &radeon_mode_funcs;  in radeon_modeset_init()
1587 		rdev_to_drm(rdev)->mode_config.async_page_flip = true;  in radeon_modeset_init()
1590 		rdev_to_drm(rdev)->mode_config.max_width = 16384;  in radeon_modeset_init()
1591 		rdev_to_drm(rdev)->mode_config.max_height = 16384;  in radeon_modeset_init()
1593 		rdev_to_drm(rdev)->mode_config.max_width = 8192;  in radeon_modeset_init()
1594 		rdev_to_drm(rdev)->mode_config.max_height = 8192;  in radeon_modeset_init()
1596 		rdev_to_drm(rdev)->mode_config.max_width = 4096;  in radeon_modeset_init()
1597 		rdev_to_drm(rdev)->mode_config.max_height = 4096;  in radeon_modeset_init()
1600 	rdev_to_drm(rdev)->mode_config.preferred_depth = 24;  in radeon_modeset_init()
1601 	rdev_to_drm(rdev)->mode_config.prefer_shadow = 1;  in radeon_modeset_init()
1603 	rdev_to_drm(rdev)->mode_config.fb_modifiers_not_supported = true;  in radeon_modeset_init()
1621 		radeon_crtc_init(rdev_to_drm(rdev), i);  in radeon_modeset_init()
1625 	ret = radeon_setup_enc_conn(rdev_to_drm(rdev));  in radeon_modeset_init()
1642 	drm_kms_helper_poll_init(rdev_to_drm(rdev));  in radeon_modeset_init()
1653 		drm_kms_helper_poll_fini(rdev_to_drm(rdev));  in radeon_modeset_fini()
1655 		drm_helper_force_disable_all(rdev_to_drm(rdev));  in radeon_modeset_fini()
1657 		drm_mode_config_cleanup(rdev_to_drm(rdev));  in radeon_modeset_fini()