Lines Matching refs:rdev

50 uint32_t r600_dma_get_rptr(struct radeon_device *rdev,  in r600_dma_get_rptr()  argument
55 if (rdev->wb.enabled) in r600_dma_get_rptr()
56 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
71 uint32_t r600_dma_get_wptr(struct radeon_device *rdev, in r600_dma_get_wptr() argument
85 void r600_dma_set_wptr(struct radeon_device *rdev, in r600_dma_set_wptr() argument
98 void r600_dma_stop(struct radeon_device *rdev) in r600_dma_stop() argument
102 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) in r600_dma_stop()
103 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); in r600_dma_stop()
108 rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; in r600_dma_stop()
119 int r600_dma_resume(struct radeon_device *rdev) in r600_dma_resume() argument
121 struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; in r600_dma_resume()
143 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); in r600_dma_resume()
145 ((rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFFFFFFFC)); in r600_dma_resume()
147 if (rdev->wb.enabled) in r600_dma_resume()
163 if (rdev->family >= CHIP_RV770) in r600_dma_resume()
173 r = radeon_ring_test(rdev, R600_RING_TYPE_DMA_INDEX, ring); in r600_dma_resume()
179 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) in r600_dma_resume()
180 radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); in r600_dma_resume()
192 void r600_dma_fini(struct radeon_device *rdev) in r600_dma_fini() argument
194 r600_dma_stop(rdev); in r600_dma_fini()
195 radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]); in r600_dma_fini()
207 bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) in r600_dma_is_lockup() argument
209 u32 reset_mask = r600_gpu_check_soft_reset(rdev); in r600_dma_is_lockup()
212 radeon_ring_lockup_update(rdev, ring); in r600_dma_is_lockup()
215 return radeon_ring_test_lockup(rdev, ring); in r600_dma_is_lockup()
229 int r600_dma_ring_test(struct radeon_device *rdev, in r600_dma_ring_test() argument
243 gpu_addr = rdev->wb.gpu_addr + index; in r600_dma_ring_test()
246 rdev->wb.wb[index/4] = cpu_to_le32(tmp); in r600_dma_ring_test()
248 r = radeon_ring_lock(rdev, ring, 4); in r600_dma_ring_test()
257 radeon_ring_unlock_commit(rdev, ring, false); in r600_dma_ring_test()
259 for (i = 0; i < rdev->usec_timeout; i++) { in r600_dma_ring_test()
260 tmp = le32_to_cpu(rdev->wb.wb[index/4]); in r600_dma_ring_test()
266 if (i < rdev->usec_timeout) { in r600_dma_ring_test()
286 void r600_dma_fence_ring_emit(struct radeon_device *rdev, in r600_dma_fence_ring_emit() argument
289 struct radeon_ring *ring = &rdev->ring[fence->ring]; in r600_dma_fence_ring_emit()
290 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_dma_fence_ring_emit()
312 bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, in r600_dma_semaphore_ring_emit() argument
336 int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) in r600_dma_ib_test() argument
350 gpu_addr = rdev->wb.gpu_addr + index; in r600_dma_ib_test()
352 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in r600_dma_ib_test()
364 r = radeon_ib_schedule(rdev, &ib, NULL, false); in r600_dma_ib_test()
366 radeon_ib_free(rdev, &ib); in r600_dma_ib_test()
380 for (i = 0; i < rdev->usec_timeout; i++) { in r600_dma_ib_test()
381 tmp = le32_to_cpu(rdev->wb.wb[index/4]); in r600_dma_ib_test()
386 if (i < rdev->usec_timeout) { in r600_dma_ib_test()
392 radeon_ib_free(rdev, &ib); in r600_dma_ib_test()
404 void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) in r600_dma_ring_ib_execute() argument
406 struct radeon_ring *ring = &rdev->ring[ib->ring]; in r600_dma_ring_ib_execute()
408 if (rdev->wb.enabled) { in r600_dma_ring_ib_execute()
443 struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, in r600_copy_dma() argument
450 int ring_index = rdev->asic->copy.dma_ring_index; in r600_copy_dma()
451 struct radeon_ring *ring = &rdev->ring[ring_index]; in r600_copy_dma()
460 r = radeon_ring_lock(rdev, ring, num_loops * 4 + 8); in r600_copy_dma()
463 radeon_sync_free(rdev, &sync, NULL); in r600_copy_dma()
467 radeon_sync_resv(rdev, &sync, resv, false); in r600_copy_dma()
468 radeon_sync_rings(rdev, &sync, ring->idx); in r600_copy_dma()
484 r = radeon_fence_emit(rdev, &fence, ring->idx); in r600_copy_dma()
486 radeon_ring_unlock_undo(rdev, ring); in r600_copy_dma()
487 radeon_sync_free(rdev, &sync, NULL); in r600_copy_dma()
491 radeon_ring_unlock_commit(rdev, ring, false); in r600_copy_dma()
492 radeon_sync_free(rdev, &sync, fence); in r600_copy_dma()