Lines Matching refs:RREG32_PCIE

93 		tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);  in rv370_pcie_gart_tlb_flush()
95 		(void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);  in rv370_pcie_gart_tlb_flush()
178 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);  in rv370_pcie_gart_enable()
198 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);  in rv370_pcie_gart_disable()
536 	link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);  in rv370_set_pcie_lanes()
552 	link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);  in rv370_set_pcie_lanes()
554 		link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);  in rv370_set_pcie_lanes()
570 	link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);  in rv370_get_pcie_lanes()
595 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);  in rv370_debugfs_pcie_gart_info_show()
597 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_BASE);  in rv370_debugfs_pcie_gart_info_show()
599 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_LO);  in rv370_debugfs_pcie_gart_info_show()
601 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_HI);  in rv370_debugfs_pcie_gart_info_show()
603 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_LO);  in rv370_debugfs_pcie_gart_info_show()
605 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_HI);  in rv370_debugfs_pcie_gart_info_show()
607 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_ERROR);  in rv370_debugfs_pcie_gart_info_show()