Lines Matching +full:panel +full:- +full:dsi
1 // SPDX-License-Identifier: GPL-2.0
3 * NV3051D MIPI-DSI panel driver for Anbernic RG353x
8 * Elida kd35t133 3.5" MIPI-DSI panel driver
14 #include <linux/media-bus-format.h>
35 struct drm_panel panel; member
41 static inline struct panel_nv3051d *panel_to_panelnv3051d(struct drm_panel *panel) in panel_to_panelnv3051d() argument
43 return container_of(panel, struct panel_nv3051d, panel); in panel_to_panelnv3051d()
48 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in panel_nv3051d_init_sequence() local
55 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x30); in panel_nv3051d_init_sequence()
56 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x52); in panel_nv3051d_init_sequence()
57 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x01); in panel_nv3051d_init_sequence()
58 mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x00); in panel_nv3051d_init_sequence()
59 mipi_dsi_dcs_write_seq(dsi, 0x03, 0x40); in panel_nv3051d_init_sequence()
60 mipi_dsi_dcs_write_seq(dsi, 0x04, 0x00); in panel_nv3051d_init_sequence()
61 mipi_dsi_dcs_write_seq(dsi, 0x05, 0x03); in panel_nv3051d_init_sequence()
62 mipi_dsi_dcs_write_seq(dsi, 0x24, 0x12); in panel_nv3051d_init_sequence()
63 mipi_dsi_dcs_write_seq(dsi, 0x25, 0x1E); in panel_nv3051d_init_sequence()
64 mipi_dsi_dcs_write_seq(dsi, 0x26, 0x28); in panel_nv3051d_init_sequence()
65 mipi_dsi_dcs_write_seq(dsi, 0x27, 0x52); in panel_nv3051d_init_sequence()
66 mipi_dsi_dcs_write_seq(dsi, 0x28, 0x57); in panel_nv3051d_init_sequence()
67 mipi_dsi_dcs_write_seq(dsi, 0x29, 0x01); in panel_nv3051d_init_sequence()
68 mipi_dsi_dcs_write_seq(dsi, 0x2A, 0xDF); in panel_nv3051d_init_sequence()
69 mipi_dsi_dcs_write_seq(dsi, 0x38, 0x9C); in panel_nv3051d_init_sequence()
70 mipi_dsi_dcs_write_seq(dsi, 0x39, 0xA7); in panel_nv3051d_init_sequence()
71 mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x53); in panel_nv3051d_init_sequence()
72 mipi_dsi_dcs_write_seq(dsi, 0x44, 0x00); in panel_nv3051d_init_sequence()
73 mipi_dsi_dcs_write_seq(dsi, 0x49, 0x3C); in panel_nv3051d_init_sequence()
74 mipi_dsi_dcs_write_seq(dsi, 0x59, 0xFE); in panel_nv3051d_init_sequence()
75 mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x00); in panel_nv3051d_init_sequence()
76 mipi_dsi_dcs_write_seq(dsi, 0x91, 0x77); in panel_nv3051d_init_sequence()
77 mipi_dsi_dcs_write_seq(dsi, 0x92, 0x77); in panel_nv3051d_init_sequence()
78 mipi_dsi_dcs_write_seq(dsi, 0xA0, 0x55); in panel_nv3051d_init_sequence()
79 mipi_dsi_dcs_write_seq(dsi, 0xA1, 0x50); in panel_nv3051d_init_sequence()
80 mipi_dsi_dcs_write_seq(dsi, 0xA4, 0x9C); in panel_nv3051d_init_sequence()
81 mipi_dsi_dcs_write_seq(dsi, 0xA7, 0x02); in panel_nv3051d_init_sequence()
82 mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x01); in panel_nv3051d_init_sequence()
83 mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x01); in panel_nv3051d_init_sequence()
84 mipi_dsi_dcs_write_seq(dsi, 0xAA, 0xFC); in panel_nv3051d_init_sequence()
85 mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x28); in panel_nv3051d_init_sequence()
86 mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x06); in panel_nv3051d_init_sequence()
87 mipi_dsi_dcs_write_seq(dsi, 0xAD, 0x06); in panel_nv3051d_init_sequence()
88 mipi_dsi_dcs_write_seq(dsi, 0xAE, 0x06); in panel_nv3051d_init_sequence()
89 mipi_dsi_dcs_write_seq(dsi, 0xAF, 0x03); in panel_nv3051d_init_sequence()
90 mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x08); in panel_nv3051d_init_sequence()
91 mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x26); in panel_nv3051d_init_sequence()
92 mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x28); in panel_nv3051d_init_sequence()
93 mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x28); in panel_nv3051d_init_sequence()
94 mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33); in panel_nv3051d_init_sequence()
95 mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x08); in panel_nv3051d_init_sequence()
96 mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x26); in panel_nv3051d_init_sequence()
97 mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x08); in panel_nv3051d_init_sequence()
98 mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x26); in panel_nv3051d_init_sequence()
99 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x30); in panel_nv3051d_init_sequence()
100 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x52); in panel_nv3051d_init_sequence()
101 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x02); in panel_nv3051d_init_sequence()
102 mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x0E); in panel_nv3051d_init_sequence()
103 mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x0E); in panel_nv3051d_init_sequence()
104 mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x29); in panel_nv3051d_init_sequence()
105 mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x2B); in panel_nv3051d_init_sequence()
106 mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C); in panel_nv3051d_init_sequence()
107 mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x0A); in panel_nv3051d_init_sequence()
108 mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x28); in panel_nv3051d_init_sequence()
109 mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x28); in panel_nv3051d_init_sequence()
110 mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x11); in panel_nv3051d_init_sequence()
111 mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x0D); in panel_nv3051d_init_sequence()
112 mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x32); in panel_nv3051d_init_sequence()
113 mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x30); in panel_nv3051d_init_sequence()
114 mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x04); in panel_nv3051d_init_sequence()
115 mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x06); in panel_nv3051d_init_sequence()
116 mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x0A); in panel_nv3051d_init_sequence()
117 mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x0A); in panel_nv3051d_init_sequence()
118 mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x01); in panel_nv3051d_init_sequence()
119 mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x01); in panel_nv3051d_init_sequence()
120 mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x13); in panel_nv3051d_init_sequence()
121 mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x13); in panel_nv3051d_init_sequence()
122 mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x11); in panel_nv3051d_init_sequence()
123 mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x11); in panel_nv3051d_init_sequence()
124 mipi_dsi_dcs_write_seq(dsi, 0xBB, 0x0F); in panel_nv3051d_init_sequence()
125 mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x0F); in panel_nv3051d_init_sequence()
126 mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x0F); in panel_nv3051d_init_sequence()
127 mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x0F); in panel_nv3051d_init_sequence()
128 mipi_dsi_dcs_write_seq(dsi, 0xBE, 0x18); in panel_nv3051d_init_sequence()
129 mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x18); in panel_nv3051d_init_sequence()
130 mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x0F); in panel_nv3051d_init_sequence()
131 mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x0F); in panel_nv3051d_init_sequence()
132 mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x17); in panel_nv3051d_init_sequence()
133 mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x17); in panel_nv3051d_init_sequence()
134 mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x3B); in panel_nv3051d_init_sequence()
135 mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x3C); in panel_nv3051d_init_sequence()
136 mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x0B); in panel_nv3051d_init_sequence()
137 mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x0C); in panel_nv3051d_init_sequence()
138 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x30); in panel_nv3051d_init_sequence()
139 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x52); in panel_nv3051d_init_sequence()
140 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x03); in panel_nv3051d_init_sequence()
141 mipi_dsi_dcs_write_seq(dsi, 0x00, 0x2A); in panel_nv3051d_init_sequence()
142 mipi_dsi_dcs_write_seq(dsi, 0x01, 0x2A); in panel_nv3051d_init_sequence()
143 mipi_dsi_dcs_write_seq(dsi, 0x02, 0x2A); in panel_nv3051d_init_sequence()
144 mipi_dsi_dcs_write_seq(dsi, 0x03, 0x2A); in panel_nv3051d_init_sequence()
145 mipi_dsi_dcs_write_seq(dsi, 0x04, 0x61); in panel_nv3051d_init_sequence()
146 mipi_dsi_dcs_write_seq(dsi, 0x05, 0x80); in panel_nv3051d_init_sequence()
147 mipi_dsi_dcs_write_seq(dsi, 0x06, 0xC7); in panel_nv3051d_init_sequence()
148 mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01); in panel_nv3051d_init_sequence()
149 mipi_dsi_dcs_write_seq(dsi, 0x08, 0x82); in panel_nv3051d_init_sequence()
150 mipi_dsi_dcs_write_seq(dsi, 0x09, 0x83); in panel_nv3051d_init_sequence()
151 mipi_dsi_dcs_write_seq(dsi, 0x30, 0x2A); in panel_nv3051d_init_sequence()
152 mipi_dsi_dcs_write_seq(dsi, 0x31, 0x2A); in panel_nv3051d_init_sequence()
153 mipi_dsi_dcs_write_seq(dsi, 0x32, 0x2A); in panel_nv3051d_init_sequence()
154 mipi_dsi_dcs_write_seq(dsi, 0x33, 0x2A); in panel_nv3051d_init_sequence()
155 mipi_dsi_dcs_write_seq(dsi, 0x34, 0x61); in panel_nv3051d_init_sequence()
156 mipi_dsi_dcs_write_seq(dsi, 0x35, 0xC5); in panel_nv3051d_init_sequence()
157 mipi_dsi_dcs_write_seq(dsi, 0x36, 0x80); in panel_nv3051d_init_sequence()
158 mipi_dsi_dcs_write_seq(dsi, 0x37, 0x23); in panel_nv3051d_init_sequence()
159 mipi_dsi_dcs_write_seq(dsi, 0x40, 0x82); in panel_nv3051d_init_sequence()
160 mipi_dsi_dcs_write_seq(dsi, 0x41, 0x83); in panel_nv3051d_init_sequence()
161 mipi_dsi_dcs_write_seq(dsi, 0x42, 0x80); in panel_nv3051d_init_sequence()
162 mipi_dsi_dcs_write_seq(dsi, 0x43, 0x81); in panel_nv3051d_init_sequence()
163 mipi_dsi_dcs_write_seq(dsi, 0x44, 0x11); in panel_nv3051d_init_sequence()
164 mipi_dsi_dcs_write_seq(dsi, 0x45, 0xF2); in panel_nv3051d_init_sequence()
165 mipi_dsi_dcs_write_seq(dsi, 0x46, 0xF1); in panel_nv3051d_init_sequence()
166 mipi_dsi_dcs_write_seq(dsi, 0x47, 0x11); in panel_nv3051d_init_sequence()
167 mipi_dsi_dcs_write_seq(dsi, 0x48, 0xF4); in panel_nv3051d_init_sequence()
168 mipi_dsi_dcs_write_seq(dsi, 0x49, 0xF3); in panel_nv3051d_init_sequence()
169 mipi_dsi_dcs_write_seq(dsi, 0x50, 0x02); in panel_nv3051d_init_sequence()
170 mipi_dsi_dcs_write_seq(dsi, 0x51, 0x01); in panel_nv3051d_init_sequence()
171 mipi_dsi_dcs_write_seq(dsi, 0x52, 0x04); in panel_nv3051d_init_sequence()
172 mipi_dsi_dcs_write_seq(dsi, 0x53, 0x03); in panel_nv3051d_init_sequence()
173 mipi_dsi_dcs_write_seq(dsi, 0x54, 0x11); in panel_nv3051d_init_sequence()
174 mipi_dsi_dcs_write_seq(dsi, 0x55, 0xF6); in panel_nv3051d_init_sequence()
175 mipi_dsi_dcs_write_seq(dsi, 0x56, 0xF5); in panel_nv3051d_init_sequence()
176 mipi_dsi_dcs_write_seq(dsi, 0x57, 0x11); in panel_nv3051d_init_sequence()
177 mipi_dsi_dcs_write_seq(dsi, 0x58, 0xF8); in panel_nv3051d_init_sequence()
178 mipi_dsi_dcs_write_seq(dsi, 0x59, 0xF7); in panel_nv3051d_init_sequence()
179 mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x02); in panel_nv3051d_init_sequence()
180 mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x80); in panel_nv3051d_init_sequence()
181 mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x5A); in panel_nv3051d_init_sequence()
182 mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x00); in panel_nv3051d_init_sequence()
183 mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x0E); in panel_nv3051d_init_sequence()
184 mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x0F); in panel_nv3051d_init_sequence()
185 mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x04); in panel_nv3051d_init_sequence()
186 mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x07); in panel_nv3051d_init_sequence()
187 mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x06); in panel_nv3051d_init_sequence()
188 mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x05); in panel_nv3051d_init_sequence()
189 mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x0F); in panel_nv3051d_init_sequence()
190 mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x00); in panel_nv3051d_init_sequence()
191 mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x0E); in panel_nv3051d_init_sequence()
192 mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x0F); in panel_nv3051d_init_sequence()
193 mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x04); in panel_nv3051d_init_sequence()
194 mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x07); in panel_nv3051d_init_sequence()
195 mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x06); in panel_nv3051d_init_sequence()
196 mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x05); in panel_nv3051d_init_sequence()
197 mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x0F); in panel_nv3051d_init_sequence()
198 mipi_dsi_dcs_write_seq(dsi, 0x81, 0x0F); in panel_nv3051d_init_sequence()
199 mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0E); in panel_nv3051d_init_sequence()
200 mipi_dsi_dcs_write_seq(dsi, 0x85, 0x0F); in panel_nv3051d_init_sequence()
201 mipi_dsi_dcs_write_seq(dsi, 0x86, 0x07); in panel_nv3051d_init_sequence()
202 mipi_dsi_dcs_write_seq(dsi, 0x87, 0x04); in panel_nv3051d_init_sequence()
203 mipi_dsi_dcs_write_seq(dsi, 0x88, 0x05); in panel_nv3051d_init_sequence()
204 mipi_dsi_dcs_write_seq(dsi, 0x89, 0x06); in panel_nv3051d_init_sequence()
205 mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x00); in panel_nv3051d_init_sequence()
206 mipi_dsi_dcs_write_seq(dsi, 0x97, 0x0F); in panel_nv3051d_init_sequence()
207 mipi_dsi_dcs_write_seq(dsi, 0x9A, 0x0E); in panel_nv3051d_init_sequence()
208 mipi_dsi_dcs_write_seq(dsi, 0x9B, 0x0F); in panel_nv3051d_init_sequence()
209 mipi_dsi_dcs_write_seq(dsi, 0x9C, 0x07); in panel_nv3051d_init_sequence()
210 mipi_dsi_dcs_write_seq(dsi, 0x9D, 0x04); in panel_nv3051d_init_sequence()
211 mipi_dsi_dcs_write_seq(dsi, 0x9E, 0x05); in panel_nv3051d_init_sequence()
212 mipi_dsi_dcs_write_seq(dsi, 0x9F, 0x06); in panel_nv3051d_init_sequence()
213 mipi_dsi_dcs_write_seq(dsi, 0xA0, 0x00); in panel_nv3051d_init_sequence()
214 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x30); in panel_nv3051d_init_sequence()
215 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x52); in panel_nv3051d_init_sequence()
216 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x02); in panel_nv3051d_init_sequence()
217 mipi_dsi_dcs_write_seq(dsi, 0x01, 0x01); in panel_nv3051d_init_sequence()
218 mipi_dsi_dcs_write_seq(dsi, 0x02, 0xDA); in panel_nv3051d_init_sequence()
219 mipi_dsi_dcs_write_seq(dsi, 0x03, 0xBA); in panel_nv3051d_init_sequence()
220 mipi_dsi_dcs_write_seq(dsi, 0x04, 0xA8); in panel_nv3051d_init_sequence()
221 mipi_dsi_dcs_write_seq(dsi, 0x05, 0x9A); in panel_nv3051d_init_sequence()
222 mipi_dsi_dcs_write_seq(dsi, 0x06, 0x70); in panel_nv3051d_init_sequence()
223 mipi_dsi_dcs_write_seq(dsi, 0x07, 0xFF); in panel_nv3051d_init_sequence()
224 mipi_dsi_dcs_write_seq(dsi, 0x08, 0x91); in panel_nv3051d_init_sequence()
225 mipi_dsi_dcs_write_seq(dsi, 0x09, 0x90); in panel_nv3051d_init_sequence()
226 mipi_dsi_dcs_write_seq(dsi, 0x0A, 0xFF); in panel_nv3051d_init_sequence()
227 mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x8F); in panel_nv3051d_init_sequence()
228 mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x60); in panel_nv3051d_init_sequence()
229 mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x58); in panel_nv3051d_init_sequence()
230 mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x48); in panel_nv3051d_init_sequence()
231 mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x38); in panel_nv3051d_init_sequence()
232 mipi_dsi_dcs_write_seq(dsi, 0x10, 0x2B); in panel_nv3051d_init_sequence()
233 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x30); in panel_nv3051d_init_sequence()
234 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x52); in panel_nv3051d_init_sequence()
235 mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x00); in panel_nv3051d_init_sequence()
236 mipi_dsi_dcs_write_seq(dsi, 0x36, 0x02); in panel_nv3051d_init_sequence()
237 mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x70); in panel_nv3051d_init_sequence()
239 dev_dbg(ctx->dev, "Panel init sequence done\n"); in panel_nv3051d_init_sequence()
244 static int panel_nv3051d_unprepare(struct drm_panel *panel) in panel_nv3051d_unprepare() argument
246 struct panel_nv3051d *ctx = panel_to_panelnv3051d(panel); in panel_nv3051d_unprepare()
247 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in panel_nv3051d_unprepare() local
250 ret = mipi_dsi_dcs_set_display_off(dsi); in panel_nv3051d_unprepare()
252 dev_err(ctx->dev, "failed to set display off: %d\n", ret); in panel_nv3051d_unprepare()
256 ret = mipi_dsi_dcs_enter_sleep_mode(dsi); in panel_nv3051d_unprepare()
258 dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret); in panel_nv3051d_unprepare()
264 gpiod_set_value_cansleep(ctx->reset_gpio, 1); in panel_nv3051d_unprepare()
266 regulator_disable(ctx->vdd); in panel_nv3051d_unprepare()
271 static int panel_nv3051d_prepare(struct drm_panel *panel) in panel_nv3051d_prepare() argument
273 struct panel_nv3051d *ctx = panel_to_panelnv3051d(panel); in panel_nv3051d_prepare()
274 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in panel_nv3051d_prepare() local
277 dev_dbg(ctx->dev, "Resetting the panel\n"); in panel_nv3051d_prepare()
278 ret = regulator_enable(ctx->vdd); in panel_nv3051d_prepare()
280 dev_err(ctx->dev, "Failed to enable vdd supply: %d\n", ret); in panel_nv3051d_prepare()
285 gpiod_set_value_cansleep(ctx->reset_gpio, 1); in panel_nv3051d_prepare()
287 gpiod_set_value_cansleep(ctx->reset_gpio, 0); in panel_nv3051d_prepare()
292 dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret); in panel_nv3051d_prepare()
296 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); in panel_nv3051d_prepare()
298 dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret); in panel_nv3051d_prepare()
304 ret = mipi_dsi_dcs_set_display_on(dsi); in panel_nv3051d_prepare()
306 dev_err(ctx->dev, "Failed to set display on: %d\n", ret); in panel_nv3051d_prepare()
315 regulator_disable(ctx->vdd); in panel_nv3051d_prepare()
319 static int panel_nv3051d_get_modes(struct drm_panel *panel, in panel_nv3051d_get_modes() argument
322 struct panel_nv3051d *ctx = panel_to_panelnv3051d(panel); in panel_nv3051d_get_modes()
323 const struct nv3051d_panel_info *panel_info = ctx->panel_info; in panel_nv3051d_get_modes()
327 for (i = 0; i < panel_info->num_modes; i++) { in panel_nv3051d_get_modes()
328 mode = drm_mode_duplicate(connector->dev, in panel_nv3051d_get_modes()
329 &panel_info->display_modes[i]); in panel_nv3051d_get_modes()
331 return -ENOMEM; in panel_nv3051d_get_modes()
335 mode->type = DRM_MODE_TYPE_DRIVER; in panel_nv3051d_get_modes()
336 if (panel_info->num_modes == 1) in panel_nv3051d_get_modes()
337 mode->type |= DRM_MODE_TYPE_PREFERRED; in panel_nv3051d_get_modes()
342 connector->display_info.bpc = 8; in panel_nv3051d_get_modes()
343 connector->display_info.width_mm = panel_info->width_mm; in panel_nv3051d_get_modes()
344 connector->display_info.height_mm = panel_info->height_mm; in panel_nv3051d_get_modes()
345 connector->display_info.bus_flags = panel_info->bus_flags; in panel_nv3051d_get_modes()
347 return panel_info->num_modes; in panel_nv3051d_get_modes()
356 static int panel_nv3051d_probe(struct mipi_dsi_device *dsi) in panel_nv3051d_probe() argument
358 struct device *dev = &dsi->dev; in panel_nv3051d_probe()
364 return -ENOMEM; in panel_nv3051d_probe()
366 ctx->dev = dev; in panel_nv3051d_probe()
368 ctx->panel_info = of_device_get_match_data(dev); in panel_nv3051d_probe()
369 if (!ctx->panel_info) in panel_nv3051d_probe()
370 return -EINVAL; in panel_nv3051d_probe()
372 ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); in panel_nv3051d_probe()
373 if (IS_ERR(ctx->reset_gpio)) { in panel_nv3051d_probe()
375 return PTR_ERR(ctx->reset_gpio); in panel_nv3051d_probe()
378 ctx->vdd = devm_regulator_get(dev, "vdd"); in panel_nv3051d_probe()
379 if (IS_ERR(ctx->vdd)) { in panel_nv3051d_probe()
380 ret = PTR_ERR(ctx->vdd); in panel_nv3051d_probe()
381 if (ret != -EPROBE_DEFER) in panel_nv3051d_probe()
386 mipi_dsi_set_drvdata(dsi, ctx); in panel_nv3051d_probe()
388 dsi->lanes = 4; in panel_nv3051d_probe()
389 dsi->format = MIPI_DSI_FMT_RGB888; in panel_nv3051d_probe()
390 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | in panel_nv3051d_probe()
393 drm_panel_init(&ctx->panel, &dsi->dev, &panel_nv3051d_funcs, in panel_nv3051d_probe()
396 ret = drm_panel_of_backlight(&ctx->panel); in panel_nv3051d_probe()
400 drm_panel_add(&ctx->panel); in panel_nv3051d_probe()
402 ret = mipi_dsi_attach(dsi); in panel_nv3051d_probe()
405 drm_panel_remove(&ctx->panel); in panel_nv3051d_probe()
412 static void panel_nv3051d_shutdown(struct mipi_dsi_device *dsi) in panel_nv3051d_shutdown() argument
414 struct panel_nv3051d *ctx = mipi_dsi_get_drvdata(dsi); in panel_nv3051d_shutdown()
417 ret = drm_panel_unprepare(&ctx->panel); in panel_nv3051d_shutdown()
419 dev_err(&dsi->dev, "Failed to unprepare panel: %d\n", ret); in panel_nv3051d_shutdown()
421 ret = drm_panel_disable(&ctx->panel); in panel_nv3051d_shutdown()
423 dev_err(&dsi->dev, "Failed to disable panel: %d\n", ret); in panel_nv3051d_shutdown()
426 static void panel_nv3051d_remove(struct mipi_dsi_device *dsi) in panel_nv3051d_remove() argument
428 struct panel_nv3051d *ctx = mipi_dsi_get_drvdata(dsi); in panel_nv3051d_remove()
431 panel_nv3051d_shutdown(dsi); in panel_nv3051d_remove()
433 ret = mipi_dsi_detach(dsi); in panel_nv3051d_remove()
435 dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret); in panel_nv3051d_remove()
437 drm_panel_remove(&ctx->panel); in panel_nv3051d_remove()
495 .name = "panel-newvision-nv3051d",
505 MODULE_DESCRIPTION("DRM driver for Newvision NV3051D based MIPI DSI panels");