Lines Matching refs:subdev
26 nvfw_ls_desc_head(struct nvkm_subdev *subdev, in nvfw_ls_desc_head() argument
31 nvkm_debug(subdev, "lsUcodeImgDesc:\n"); in nvfw_ls_desc_head()
32 nvkm_debug(subdev, "\tdescriptorSize : %d\n", in nvfw_ls_desc_head()
34 nvkm_debug(subdev, "\timageSize : %d\n", hdr->image_size); in nvfw_ls_desc_head()
35 nvkm_debug(subdev, "\ttoolsVersion : 0x%x\n", in nvfw_ls_desc_head()
37 nvkm_debug(subdev, "\tappVersion : 0x%x\n", hdr->app_version); in nvfw_ls_desc_head()
40 nvkm_debug(subdev, "\tdate : %s\n", date); in nvfw_ls_desc_head()
43 nvkm_debug(subdev, "\tbootloaderStartOffset: 0x%x\n", in nvfw_ls_desc_head()
45 nvkm_debug(subdev, "\tbootloaderSize : 0x%x\n", in nvfw_ls_desc_head()
47 nvkm_debug(subdev, "\tbootloaderImemOffset : 0x%x\n", in nvfw_ls_desc_head()
49 nvkm_debug(subdev, "\tbootloaderEntryPoint : 0x%x\n", in nvfw_ls_desc_head()
52 nvkm_debug(subdev, "\tappStartOffset : 0x%x\n", in nvfw_ls_desc_head()
54 nvkm_debug(subdev, "\tappSize : 0x%x\n", hdr->app_size); in nvfw_ls_desc_head()
55 nvkm_debug(subdev, "\tappImemOffset : 0x%x\n", in nvfw_ls_desc_head()
57 nvkm_debug(subdev, "\tappImemEntry : 0x%x\n", in nvfw_ls_desc_head()
59 nvkm_debug(subdev, "\tappDmemOffset : 0x%x\n", in nvfw_ls_desc_head()
61 nvkm_debug(subdev, "\tappResidentCodeOffset: 0x%x\n", in nvfw_ls_desc_head()
63 nvkm_debug(subdev, "\tappResidentCodeSize : 0x%x\n", in nvfw_ls_desc_head()
65 nvkm_debug(subdev, "\tappResidentDataOffset: 0x%x\n", in nvfw_ls_desc_head()
67 nvkm_debug(subdev, "\tappResidentDataSize : 0x%x\n", in nvfw_ls_desc_head()
72 nvfw_ls_desc(struct nvkm_subdev *subdev, const void *data) in nvfw_ls_desc() argument
77 nvfw_ls_desc_head(subdev, &hdr->head); in nvfw_ls_desc()
79 nvkm_debug(subdev, "\tnbOverlays : %d\n", hdr->nb_overlays); in nvfw_ls_desc()
81 nvkm_debug(subdev, "\tloadOvl[%d] : 0x%x %d\n", i, in nvfw_ls_desc()
84 nvkm_debug(subdev, "\tcompressed : %d\n", hdr->compressed); in nvfw_ls_desc()
90 nvfw_ls_desc_v1(struct nvkm_subdev *subdev, const void *data) in nvfw_ls_desc_v1() argument
95 nvfw_ls_desc_head(subdev, &hdr->head); in nvfw_ls_desc_v1()
97 nvkm_debug(subdev, "\tnbImemOverlays : %d\n", in nvfw_ls_desc_v1()
99 nvkm_debug(subdev, "\tnbDmemOverlays : %d\n", in nvfw_ls_desc_v1()
102 nvkm_debug(subdev, "\tloadOvl[%2d] : 0x%x %d\n", i, in nvfw_ls_desc_v1()
105 nvkm_debug(subdev, "\tcompressed : %d\n", hdr->compressed); in nvfw_ls_desc_v1()
111 nvfw_ls_desc_v2(struct nvkm_subdev *subdev, const void *data) in nvfw_ls_desc_v2() argument
117 nvkm_debug(subdev, "lsUcodeImgDesc:\n"); in nvfw_ls_desc_v2()
118 nvkm_debug(subdev, "\tdescriptorSize : %d\n", hdr->descriptor_size); in nvfw_ls_desc_v2()
119 nvkm_debug(subdev, "\timageSize : %d\n", hdr->image_size); in nvfw_ls_desc_v2()
120 nvkm_debug(subdev, "\ttoolsVersion : 0x%x\n", hdr->tools_version); in nvfw_ls_desc_v2()
121 nvkm_debug(subdev, "\tappVersion : 0x%x\n", hdr->app_version); in nvfw_ls_desc_v2()
124 nvkm_debug(subdev, "\tdate : %s\n", date); in nvfw_ls_desc_v2()
127 nvkm_debug(subdev, "\tsecureBootloader : 0x%x\n", hdr->secure_bootloader); in nvfw_ls_desc_v2()
128 nvkm_debug(subdev, "\tbootloaderStartOffset: 0x%x\n", hdr->bootloader_start_offset); in nvfw_ls_desc_v2()
129 nvkm_debug(subdev, "\tbootloaderSize : 0x%x\n", hdr->bootloader_size); in nvfw_ls_desc_v2()
130 nvkm_debug(subdev, "\tbootloaderImemOffset : 0x%x\n", hdr->bootloader_imem_offset); in nvfw_ls_desc_v2()
131 nvkm_debug(subdev, "\tbootloaderEntryPoint : 0x%x\n", hdr->bootloader_entry_point); in nvfw_ls_desc_v2()
133 nvkm_debug(subdev, "\tappStartOffset : 0x%x\n", hdr->app_start_offset); in nvfw_ls_desc_v2()
134 nvkm_debug(subdev, "\tappSize : 0x%x\n", hdr->app_size); in nvfw_ls_desc_v2()
135 nvkm_debug(subdev, "\tappImemOffset : 0x%x\n", hdr->app_imem_offset); in nvfw_ls_desc_v2()
136 nvkm_debug(subdev, "\tappImemEntry : 0x%x\n", hdr->app_imem_entry); in nvfw_ls_desc_v2()
137 nvkm_debug(subdev, "\tappDmemOffset : 0x%x\n", hdr->app_dmem_offset); in nvfw_ls_desc_v2()
138 nvkm_debug(subdev, "\tappResidentCodeOffset: 0x%x\n", hdr->app_resident_code_offset); in nvfw_ls_desc_v2()
139 nvkm_debug(subdev, "\tappResidentCodeSize : 0x%x\n", hdr->app_resident_code_size); in nvfw_ls_desc_v2()
140 nvkm_debug(subdev, "\tappResidentDataOffset: 0x%x\n", hdr->app_resident_data_offset); in nvfw_ls_desc_v2()
141 nvkm_debug(subdev, "\tappResidentDataSize : 0x%x\n", hdr->app_resident_data_size); in nvfw_ls_desc_v2()
143 nvkm_debug(subdev, "\tnbImemOverlays : %d\n", hdr->nb_imem_overlays); in nvfw_ls_desc_v2()
144 nvkm_debug(subdev, "\tnbDmemOverlays : %d\n", hdr->nb_dmem_overlays); in nvfw_ls_desc_v2()
146 nvkm_debug(subdev, "\tloadOvl[%d] : 0x%x %d\n", i, in nvfw_ls_desc_v2()
154 nvfw_ls_hsbl_bin_hdr(struct nvkm_subdev *subdev, const void *data) in nvfw_ls_hsbl_bin_hdr() argument
158 nvkm_debug(subdev, "lsHsblBinHdr:\n"); in nvfw_ls_hsbl_bin_hdr()
159 nvkm_debug(subdev, "\tbinMagic : 0x%08x\n", hdr->bin_magic); in nvfw_ls_hsbl_bin_hdr()
160 nvkm_debug(subdev, "\tbinVer : %d\n", hdr->bin_ver); in nvfw_ls_hsbl_bin_hdr()
161 nvkm_debug(subdev, "\tbinSize : %d\n", hdr->bin_size); in nvfw_ls_hsbl_bin_hdr()
162 nvkm_debug(subdev, "\theaderOffset : 0x%x\n", hdr->header_offset); in nvfw_ls_hsbl_bin_hdr()
167 nvfw_ls_hsbl_hdr(struct nvkm_subdev *subdev, const void *data) in nvfw_ls_hsbl_hdr() argument
171 nvkm_debug(subdev, "lsHsblHdr:\n"); in nvfw_ls_hsbl_hdr()
172 nvkm_debug(subdev, "\tsigProdOffset : 0x%x\n", hdr->sig_prod_offset); in nvfw_ls_hsbl_hdr()
173 nvkm_debug(subdev, "\tsigProdSize : 0x%x\n", hdr->sig_prod_size); in nvfw_ls_hsbl_hdr()
174 nvkm_debug(subdev, "\tpatchLoc : 0x%x\n", hdr->patch_loc); in nvfw_ls_hsbl_hdr()
175 nvkm_debug(subdev, "\tpatchSig : 0x%x\n", hdr->patch_sig); in nvfw_ls_hsbl_hdr()
176 nvkm_debug(subdev, "\tmetadataOffset : 0x%x\n", hdr->meta_data_offset); in nvfw_ls_hsbl_hdr()
177 nvkm_debug(subdev, "\tmetadataSize : 0x%x\n", hdr->meta_data_size); in nvfw_ls_hsbl_hdr()
178 nvkm_debug(subdev, "\tnumSig : 0x%x\n", hdr->num_sig); in nvfw_ls_hsbl_hdr()