Lines Matching refs:subdev
26 wpr_header_dump(struct nvkm_subdev *subdev, const struct wpr_header *hdr) in wpr_header_dump() argument
28 nvkm_debug(subdev, "wprHeader\n"); in wpr_header_dump()
29 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_dump()
30 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_dump()
31 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_dump()
32 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_dump()
33 nvkm_debug(subdev, "\tstatus : %d\n", hdr->status); in wpr_header_dump()
37 wpr_header_v1_dump(struct nvkm_subdev *subdev, const struct wpr_header_v1 *hdr) in wpr_header_v1_dump() argument
39 nvkm_debug(subdev, "wprHeader\n"); in wpr_header_v1_dump()
40 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_v1_dump()
41 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_v1_dump()
42 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_v1_dump()
43 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_v1_dump()
44 nvkm_debug(subdev, "\tbinVersion : %d\n", hdr->bin_version); in wpr_header_v1_dump()
45 nvkm_debug(subdev, "\tstatus : %d\n", hdr->status); in wpr_header_v1_dump()
49 wpr_generic_header_dump(struct nvkm_subdev *subdev, const struct wpr_generic_header *hdr) in wpr_generic_header_dump() argument
51 nvkm_debug(subdev, "wprGenericHeader\n"); in wpr_generic_header_dump()
52 nvkm_debug(subdev, "\tidentifier : %04x\n", hdr->identifier); in wpr_generic_header_dump()
53 nvkm_debug(subdev, "\tversion : %04x\n", hdr->version); in wpr_generic_header_dump()
54 nvkm_debug(subdev, "\tsize : %08x\n", hdr->size); in wpr_generic_header_dump()
58 wpr_header_v2_dump(struct nvkm_subdev *subdev, const struct wpr_header_v2 *hdr) in wpr_header_v2_dump() argument
60 wpr_generic_header_dump(subdev, &hdr->hdr); in wpr_header_v2_dump()
61 wpr_header_v1_dump(subdev, &hdr->wpr); in wpr_header_v2_dump()
65 lsb_header_v2_dump(struct nvkm_subdev *subdev, struct lsb_header_v2 *hdr) in lsb_header_v2_dump() argument
67 wpr_generic_header_dump(subdev, &hdr->hdr); in lsb_header_v2_dump()
68 nvkm_debug(subdev, "lsbHeader\n"); in lsb_header_v2_dump()
69 nvkm_debug(subdev, "\tucodeOff : 0x%x\n", hdr->ucode_off); in lsb_header_v2_dump()
70 nvkm_debug(subdev, "\tucodeSize : 0x%x\n", hdr->ucode_size); in lsb_header_v2_dump()
71 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); in lsb_header_v2_dump()
72 nvkm_debug(subdev, "\tblCodeSize : 0x%x\n", hdr->bl_code_size); in lsb_header_v2_dump()
73 nvkm_debug(subdev, "\tblImemOff : 0x%x\n", hdr->bl_imem_off); in lsb_header_v2_dump()
74 nvkm_debug(subdev, "\tblDataOff : 0x%x\n", hdr->bl_data_off); in lsb_header_v2_dump()
75 nvkm_debug(subdev, "\tblDataSize : 0x%x\n", hdr->bl_data_size); in lsb_header_v2_dump()
76 nvkm_debug(subdev, "\treserved0 : %08x\n", hdr->rsvd0); in lsb_header_v2_dump()
77 nvkm_debug(subdev, "\tappCodeOff : 0x%x\n", hdr->app_code_off); in lsb_header_v2_dump()
78 nvkm_debug(subdev, "\tappCodeSize : 0x%x\n", hdr->app_code_size); in lsb_header_v2_dump()
79 nvkm_debug(subdev, "\tappDataOff : 0x%x\n", hdr->app_data_off); in lsb_header_v2_dump()
80 nvkm_debug(subdev, "\tappDataSize : 0x%x\n", hdr->app_data_size); in lsb_header_v2_dump()
81 nvkm_debug(subdev, "\tappImemOffset : 0x%x\n", hdr->app_imem_offset); in lsb_header_v2_dump()
82 nvkm_debug(subdev, "\tappDmemOffset : 0x%x\n", hdr->app_dmem_offset); in lsb_header_v2_dump()
83 nvkm_debug(subdev, "\tflags : 0x%x\n", hdr->flags); in lsb_header_v2_dump()
84 nvkm_debug(subdev, "\tmonitorCodeOff: 0x%x\n", hdr->monitor_code_offset); in lsb_header_v2_dump()
85 nvkm_debug(subdev, "\tmonitorDataOff: 0x%x\n", hdr->monitor_data_offset); in lsb_header_v2_dump()
86 nvkm_debug(subdev, "\tmanifestOffset: 0x%x\n", hdr->manifest_offset); in lsb_header_v2_dump()
90 lsb_header_tail_dump(struct nvkm_subdev *subdev, struct lsb_header_tail *hdr) in lsb_header_tail_dump() argument
92 nvkm_debug(subdev, "lsbHeader\n"); in lsb_header_tail_dump()
93 nvkm_debug(subdev, "\tucodeOff : 0x%x\n", hdr->ucode_off); in lsb_header_tail_dump()
94 nvkm_debug(subdev, "\tucodeSize : 0x%x\n", hdr->ucode_size); in lsb_header_tail_dump()
95 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); in lsb_header_tail_dump()
96 nvkm_debug(subdev, "\tblCodeSize : 0x%x\n", hdr->bl_code_size); in lsb_header_tail_dump()
97 nvkm_debug(subdev, "\tblImemOff : 0x%x\n", hdr->bl_imem_off); in lsb_header_tail_dump()
98 nvkm_debug(subdev, "\tblDataOff : 0x%x\n", hdr->bl_data_off); in lsb_header_tail_dump()
99 nvkm_debug(subdev, "\tblDataSize : 0x%x\n", hdr->bl_data_size); in lsb_header_tail_dump()
100 nvkm_debug(subdev, "\tappCodeOff : 0x%x\n", hdr->app_code_off); in lsb_header_tail_dump()
101 nvkm_debug(subdev, "\tappCodeSize : 0x%x\n", hdr->app_code_size); in lsb_header_tail_dump()
102 nvkm_debug(subdev, "\tappDataOff : 0x%x\n", hdr->app_data_off); in lsb_header_tail_dump()
103 nvkm_debug(subdev, "\tappDataSize : 0x%x\n", hdr->app_data_size); in lsb_header_tail_dump()
104 nvkm_debug(subdev, "\tflags : 0x%x\n", hdr->flags); in lsb_header_tail_dump()
108 lsb_header_dump(struct nvkm_subdev *subdev, struct lsb_header *hdr) in lsb_header_dump() argument
110 lsb_header_tail_dump(subdev, &hdr->tail); in lsb_header_dump()
114 lsb_header_v1_dump(struct nvkm_subdev *subdev, struct lsb_header_v1 *hdr) in lsb_header_v1_dump() argument
116 lsb_header_tail_dump(subdev, &hdr->tail); in lsb_header_v1_dump()
120 flcn_acr_desc_dump(struct nvkm_subdev *subdev, struct flcn_acr_desc *hdr) in flcn_acr_desc_dump() argument
124 nvkm_debug(subdev, "acrDesc\n"); in flcn_acr_desc_dump()
125 nvkm_debug(subdev, "\twprRegionId : %d\n", hdr->wpr_region_id); in flcn_acr_desc_dump()
126 nvkm_debug(subdev, "\twprOffset : 0x%x\n", hdr->wpr_offset); in flcn_acr_desc_dump()
127 nvkm_debug(subdev, "\tmmuMemRange : 0x%x\n", in flcn_acr_desc_dump()
129 nvkm_debug(subdev, "\tnoRegions : %d\n", in flcn_acr_desc_dump()
133 nvkm_debug(subdev, "\tregion[%d] :\n", i); in flcn_acr_desc_dump()
134 nvkm_debug(subdev, "\t startAddr : 0x%x\n", in flcn_acr_desc_dump()
136 nvkm_debug(subdev, "\t endAddr : 0x%x\n", in flcn_acr_desc_dump()
138 nvkm_debug(subdev, "\t regionId : %d\n", in flcn_acr_desc_dump()
140 nvkm_debug(subdev, "\t readMask : 0x%x\n", in flcn_acr_desc_dump()
142 nvkm_debug(subdev, "\t writeMask : 0x%x\n", in flcn_acr_desc_dump()
144 nvkm_debug(subdev, "\t clientMask : 0x%x\n", in flcn_acr_desc_dump()
148 nvkm_debug(subdev, "\tucodeBlobSize: %d\n", in flcn_acr_desc_dump()
150 nvkm_debug(subdev, "\tucodeBlobBase: 0x%llx\n", in flcn_acr_desc_dump()
152 nvkm_debug(subdev, "\tvprEnabled : %d\n", in flcn_acr_desc_dump()
154 nvkm_debug(subdev, "\tvprStart : 0x%x\n", in flcn_acr_desc_dump()
156 nvkm_debug(subdev, "\tvprEnd : 0x%x\n", in flcn_acr_desc_dump()
158 nvkm_debug(subdev, "\thdcpPolicies : 0x%x\n", in flcn_acr_desc_dump()
163 flcn_acr_desc_v1_dump(struct nvkm_subdev *subdev, struct flcn_acr_desc_v1 *hdr) in flcn_acr_desc_v1_dump() argument
167 nvkm_debug(subdev, "acrDesc\n"); in flcn_acr_desc_v1_dump()
168 nvkm_debug(subdev, "\twprRegionId : %d\n", hdr->wpr_region_id); in flcn_acr_desc_v1_dump()
169 nvkm_debug(subdev, "\twprOffset : 0x%x\n", hdr->wpr_offset); in flcn_acr_desc_v1_dump()
170 nvkm_debug(subdev, "\tmmuMemoryRange : 0x%x\n", in flcn_acr_desc_v1_dump()
172 nvkm_debug(subdev, "\tnoRegions : %d\n", in flcn_acr_desc_v1_dump()
176 nvkm_debug(subdev, "\tregion[%d] :\n", i); in flcn_acr_desc_v1_dump()
177 nvkm_debug(subdev, "\t startAddr : 0x%x\n", in flcn_acr_desc_v1_dump()
179 nvkm_debug(subdev, "\t endAddr : 0x%x\n", in flcn_acr_desc_v1_dump()
181 nvkm_debug(subdev, "\t regionId : %d\n", in flcn_acr_desc_v1_dump()
183 nvkm_debug(subdev, "\t readMask : 0x%x\n", in flcn_acr_desc_v1_dump()
185 nvkm_debug(subdev, "\t writeMask : 0x%x\n", in flcn_acr_desc_v1_dump()
187 nvkm_debug(subdev, "\t clientMask : 0x%x\n", in flcn_acr_desc_v1_dump()
189 nvkm_debug(subdev, "\t shadowMemStartAddr: 0x%x\n", in flcn_acr_desc_v1_dump()
193 nvkm_debug(subdev, "\tucodeBlobSize : %d\n", in flcn_acr_desc_v1_dump()
195 nvkm_debug(subdev, "\tucodeBlobBase : 0x%llx\n", in flcn_acr_desc_v1_dump()
197 nvkm_debug(subdev, "\tvprEnabled : %d\n", in flcn_acr_desc_v1_dump()
199 nvkm_debug(subdev, "\tvprStart : 0x%x\n", in flcn_acr_desc_v1_dump()
201 nvkm_debug(subdev, "\tvprEnd : 0x%x\n", in flcn_acr_desc_v1_dump()
203 nvkm_debug(subdev, "\thdcpPolicies : 0x%x\n", in flcn_acr_desc_v1_dump()