Lines Matching refs:xtensa

30 	struct nvkm_xtensa *xtensa = nvkm_xtensa(oclass->engine);  in nvkm_xtensa_oclass_get()  local
33 while (xtensa->func->sclass[c].oclass) { in nvkm_xtensa_oclass_get()
35 oclass->base = xtensa->func->sclass[index]; in nvkm_xtensa_oclass_get()
59 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); in nvkm_xtensa_intr() local
60 struct nvkm_subdev *subdev = &xtensa->engine.subdev; in nvkm_xtensa_intr()
62 const u32 base = xtensa->addr; in nvkm_xtensa_intr()
74 nvkm_mask(device, xtensa->addr + 0xd94, 0, xtensa->func->fifo_val); in nvkm_xtensa_intr()
81 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); in nvkm_xtensa_fini() local
82 struct nvkm_device *device = xtensa->engine.subdev.device; in nvkm_xtensa_fini()
83 const u32 base = xtensa->addr; in nvkm_xtensa_fini()
89 nvkm_memory_unref(&xtensa->gpu_fw); in nvkm_xtensa_fini()
96 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); in nvkm_xtensa_init() local
97 struct nvkm_subdev *subdev = &xtensa->engine.subdev; in nvkm_xtensa_init()
99 const u32 base = xtensa->addr; in nvkm_xtensa_init()
106 if (!xtensa->gpu_fw) { in nvkm_xtensa_init()
108 xtensa->addr >> 12); in nvkm_xtensa_init()
124 &xtensa->gpu_fw); in nvkm_xtensa_init()
130 nvkm_kmap(xtensa->gpu_fw); in nvkm_xtensa_init()
132 nvkm_wo32(xtensa->gpu_fw, i * 4, *((u32 *)fw->data + i)); in nvkm_xtensa_init()
133 nvkm_done(xtensa->gpu_fw); in nvkm_xtensa_init()
137 addr = nvkm_memory_addr(xtensa->gpu_fw); in nvkm_xtensa_init()
138 size = nvkm_memory_size(xtensa->gpu_fw); in nvkm_xtensa_init()
143 nvkm_wr32(device, base + 0xd28, xtensa->func->unkd28); /* ?? */ in nvkm_xtensa_init()
182 struct nvkm_xtensa *xtensa; in nvkm_xtensa_new_() local
184 if (!(xtensa = kzalloc(sizeof(*xtensa), GFP_KERNEL))) in nvkm_xtensa_new_()
186 xtensa->func = func; in nvkm_xtensa_new_()
187 xtensa->addr = addr; in nvkm_xtensa_new_()
188 *pengine = &xtensa->engine; in nvkm_xtensa_new_()
190 return nvkm_engine_ctor(&nvkm_xtensa, device, type, inst, enable, &xtensa->engine); in nvkm_xtensa_new_()