Lines Matching refs:device
43 nvkm_wr32(chan->cgrp->runl->fifo->engine.subdev.device, 0x002634, chan->id); in gf100_chan_preempt()
49 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_stop() local
51 nvkm_mask(device, 0x003004 + (chan->id * 8), 0x00000001, 0x00000000); in gf100_chan_stop()
57 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_start() local
59 nvkm_wr32(device, 0x003004 + (chan->id * 8), 0x001f0001); in gf100_chan_start()
68 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_chan_unbind() local
73 nvkm_wr32(device, 0x003000 + (chan->id * 8), 0x00000000); in gf100_chan_unbind()
79 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_bind() local
81 nvkm_wr32(device, 0x003000 + (chan->id * 8), 0xc0000000 | chan->inst->addr >> 12); in gf100_chan_bind()
206 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_engn_mmu_fault_triggered() local
207 u32 data = nvkm_rd32(device, 0x002a30 + (engn->id * 4)); in gf100_engn_mmu_fault_triggered()
214 nvkm_mask(device, 0x002a30 + (engn->id * 4), 0x00000100, 0x00000000); in gf100_engn_mmu_fault_triggered()
216 nvkm_mask(device, 0x002140, 0x00000100, 0x00000100); in gf100_engn_mmu_fault_triggered()
226 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_engn_mmu_fault_trigger() local
231 nvkm_mask(device, 0x002140, 0x00000100, 0x00000000); in gf100_engn_mmu_fault_trigger()
232 nvkm_wr32(device, 0x002100, 0x00000100); in gf100_engn_mmu_fault_trigger()
233 nvkm_wr32(device, 0x002a30 + (engn->id * 4), 0x00000100 | engn->fault); in gf100_engn_mmu_fault_trigger()
249 u32 stat = nvkm_rd32(engn->engine->subdev.device, 0x002640 + (engn->id * 4)); in gf100_engn_status()
313 struct nvkm_device *device = subdev->device; in gf100_runq_intr() local
314 u32 mask = nvkm_rd32(device, 0x04010c + (runq->id * 0x2000)); in gf100_runq_intr()
315 u32 stat = nvkm_rd32(device, 0x040108 + (runq->id * 0x2000)) & mask; in gf100_runq_intr()
316 u32 addr = nvkm_rd32(device, 0x0400c0 + (runq->id * 0x2000)); in gf100_runq_intr()
317 u32 data = nvkm_rd32(device, 0x0400c4 + (runq->id * 0x2000)); in gf100_runq_intr()
318 u32 chid = nvkm_rd32(device, 0x040120 + (runq->id * 0x2000)) & runq->fifo->chid->mask; in gf100_runq_intr()
327 if (device->sw) { in gf100_runq_intr()
328 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) in gf100_runq_intr()
347 nvkm_wr32(device, 0x0400c0 + (runq->id * 0x2000), 0x80600008); in gf100_runq_intr()
348 nvkm_wr32(device, 0x040108 + (runq->id * 0x2000), stat); in gf100_runq_intr()
355 struct nvkm_device *device = runq->fifo->engine.subdev.device; in gf100_runq_init() local
357 nvkm_mask(device, 0x04013c + (runq->id * 0x2000), 0x10000100, 0x00000000); in gf100_runq_init()
358 nvkm_wr32(device, 0x040108 + (runq->id * 0x2000), 0xffffffff); /* INTR */ in gf100_runq_init()
359 nvkm_wr32(device, 0x04010c + (runq->id * 0x2000), 0xfffffeff); /* INTREN */ in gf100_runq_init()
372 return nvkm_rd32(runl->fifo->engine.subdev.device, 0x002634) & 0x00100000; in gf100_runl_preempt_pending()
378 nvkm_mask(runl->fifo->engine.subdev.device, 0x00262c, 0x00000000, 0x00000000); in gf100_runl_fault_clear()
384 nvkm_mask(runl->fifo->engine.subdev.device, 0x002630, engm, 0x00000000); in gf100_runl_allow()
390 nvkm_mask(runl->fifo->engine.subdev.device, 0x002630, engm, engm); in gf100_runl_block()
396 return nvkm_rd32(runl->fifo->engine.subdev.device, 0x00227c) & 0x00100000; in gf100_runl_pending()
402 struct nvkm_device *device = runl->fifo->engine.subdev.device; in gf100_runl_commit() local
414 nvkm_wr32(device, 0x002270, (target << 28) | (addr >> 12)); in gf100_runl_commit()
415 nvkm_wr32(device, 0x002274, 0x01f00000 | count); in gf100_runl_commit()
446 nvkm_mask(fifo->engine.subdev.device, 0x002140, 0x80000000, 0x80000000); in gf100_fifo_nonstall_allow()
457 nvkm_mask(fifo->engine.subdev.device, 0x002140, 0x80000000, 0x00000000); in gf100_fifo_nonstall_block()
537 struct nvkm_device *device = subdev->device; in gf100_fifo_mmu_fault_recover() local
576 nvkm_bar_bar1_reset(device); in gf100_fifo_mmu_fault_recover()
579 nvkm_bar_bar2_reset(device); in gf100_fifo_mmu_fault_recover()
582 nvkm_mask(device, 0x001718, 0x00000000, 0x00000000); in gf100_fifo_mmu_fault_recover()
677 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_sched() local
678 u32 intr = nvkm_rd32(device, 0x00254c); in gf100_fifo_intr_sched()
698 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_intr_mmu_fault_unit() local
699 u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10)); in gf100_fifo_intr_mmu_fault_unit()
700 u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10)); in gf100_fifo_intr_mmu_fault_unit()
701 u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10)); in gf100_fifo_intr_mmu_fault_unit()
702 u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10)); in gf100_fifo_intr_mmu_fault_unit()
722 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_intr_mmu_fault() local
723 unsigned long mask = nvkm_rd32(device, 0x00259c); in gf100_fifo_intr_mmu_fault()
728 nvkm_wr32(device, 0x00259c, BIT(unit)); in gf100_fifo_intr_mmu_fault()
735 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_intr_pbdma() local
737 u32 mask = nvkm_rd32(device, 0x0025a0); in gf100_fifo_intr_pbdma()
744 nvkm_wr32(device, 0x0025a0, BIT(runq->id)); in gf100_fifo_intr_pbdma()
754 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_runlist() local
755 u32 intr = nvkm_rd32(device, 0x002a00); in gf100_fifo_intr_runlist()
758 nvkm_wr32(device, 0x002a00, 0x10000000); in gf100_fifo_intr_runlist()
764 nvkm_wr32(device, 0x002a00, intr); in gf100_fifo_intr_runlist()
772 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_engine_unit() local
773 u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04)); in gf100_fifo_intr_engine_unit()
774 u32 inte = nvkm_rd32(device, 0x002628); in gf100_fifo_intr_engine_unit()
777 nvkm_wr32(device, 0x0025a8 + (engn * 0x04), intr); in gf100_fifo_intr_engine_unit()
787 nvkm_mask(device, 0x002628, ints, 0); in gf100_fifo_intr_engine_unit()
795 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_intr_engine() local
796 u32 mask = nvkm_rd32(device, 0x0025a4); in gf100_fifo_intr_engine()
810 struct nvkm_device *device = subdev->device; in gf100_fifo_intr() local
811 u32 mask = nvkm_rd32(device, 0x002140); in gf100_fifo_intr()
812 u32 stat = nvkm_rd32(device, 0x002100) & mask; in gf100_fifo_intr()
815 u32 intr = nvkm_rd32(device, 0x00252c); in gf100_fifo_intr()
817 nvkm_wr32(device, 0x002100, 0x00000001); in gf100_fifo_intr()
823 nvkm_wr32(device, 0x002100, 0x00000100); in gf100_fifo_intr()
828 u32 intr = nvkm_rd32(device, 0x00256c); in gf100_fifo_intr()
830 nvkm_wr32(device, 0x002100, 0x00010000); in gf100_fifo_intr()
835 u32 intr = nvkm_rd32(device, 0x00258c); in gf100_fifo_intr()
837 nvkm_wr32(device, 0x002100, 0x01000000); in gf100_fifo_intr()
864 nvkm_mask(device, 0x002140, stat, 0x00000000); in gf100_fifo_intr()
866 nvkm_wr32(device, 0x002100, stat); in gf100_fifo_intr()
875 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_init_pbdmas() local
878 nvkm_wr32(device, 0x000204, mask); in gf100_fifo_init_pbdmas()
879 nvkm_wr32(device, 0x002204, mask); in gf100_fifo_init_pbdmas()
883 nvkm_wr32(device, 0x002208, ~(1 << 0)); /* PGRAPH */ in gf100_fifo_init_pbdmas()
884 nvkm_wr32(device, 0x00220c, ~(1 << 1)); /* PVP */ in gf100_fifo_init_pbdmas()
885 nvkm_wr32(device, 0x002210, ~(1 << 1)); /* PMSPP */ in gf100_fifo_init_pbdmas()
886 nvkm_wr32(device, 0x002214, ~(1 << 1)); /* PMSVLD */ in gf100_fifo_init_pbdmas()
887 nvkm_wr32(device, 0x002218, ~(1 << 2)); /* PCE0 */ in gf100_fifo_init_pbdmas()
888 nvkm_wr32(device, 0x00221c, ~(1 << 1)); /* PCE1 */ in gf100_fifo_init_pbdmas()
891 nvkm_mask(device, 0x002a04, 0xbfffffff, 0xbfffffff); in gf100_fifo_init_pbdmas()
897 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_init() local
899 nvkm_mask(device, 0x002200, 0x00000001, 0x00000001); in gf100_fifo_init()
900 nvkm_wr32(device, 0x002254, 0x10000000 | fifo->userd.bar1->addr >> 12); in gf100_fifo_init()
902 nvkm_wr32(device, 0x002100, 0xffffffff); in gf100_fifo_init()
903 nvkm_wr32(device, 0x002140, 0x7fffffff); in gf100_fifo_init()
904 nvkm_wr32(device, 0x002628, 0x00000001); /* ENGINE_INTR_EN */ in gf100_fifo_init()
929 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_runq_nr() local
933 save = nvkm_mask(device, 0x000204, 0xffffffff, 0xffffffff); in gf100_fifo_runq_nr()
934 save = nvkm_mask(device, 0x000204, 0xffffffff, save); in gf100_fifo_runq_nr()
965 gf100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, in gf100_fifo_new() argument
968 return nvkm_fifo_new_(&gf100_fifo, device, type, inst, pfifo); in gf100_fifo_new()