37 	struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device;  in g84_chan_bind()
45 	struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device;  in g84_chan_ramfc_write()
108 	struct nvkm_subdev *subdev = &chan->cgrp->runl->fifo->engine.subdev;  in g84_ectx_bind()
164 	struct nvkm_fifo *fifo = container_of(event, typeof(*fifo), nonstall.event);  in g84_fifo_nonstall_block()  local
167 	spin_lock_irqsave(&fifo->lock, flags);  in g84_fifo_nonstall_block()
168 	nvkm_mask(fifo->engine.subdev.device, 0x002140, 0x40000000, 0x00000000);  in g84_fifo_nonstall_block()
169 	spin_unlock_irqrestore(&fifo->lock, flags);  in g84_fifo_nonstall_block()
175 	struct nvkm_fifo *fifo = container_of(event, typeof(*fifo), nonstall.event);  in g84_fifo_nonstall_allow()  local
178 	spin_lock_irqsave(&fifo->lock, flags);  in g84_fifo_nonstall_allow()
179 	nvkm_mask(fifo->engine.subdev.device, 0x002140, 0x40000000, 0x40000000);  in g84_fifo_nonstall_allow()
180 	spin_unlock_irqrestore(&fifo->lock, flags);  in g84_fifo_nonstall_allow()
190 g84_fifo_runl_ctor(struct nvkm_fifo *fifo)  in g84_fifo_runl_ctor()  argument
194 	runl = nvkm_runl_new(fifo, 0, 0, 0);  in g84_fifo_runl_ctor()
198 	nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_SW, 0);  in g84_fifo_runl_ctor()
199 	nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_DMAOBJ, 0);  in g84_fifo_runl_ctor()
200 	nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0);  in g84_fifo_runl_ctor()
201 	nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MPEG, 0);  in g84_fifo_runl_ctor()
202 	nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_ME, 0);  in g84_fifo_runl_ctor()
203 	nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_VP, 0);  in g84_fifo_runl_ctor()
204 	nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_CIPHER, 0);  in g84_fifo_runl_ctor()
205 	nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_BSP, 0);  in g84_fifo_runl_ctor()