370 	struct nv50_head_atom *asyh = nv50_head_atom(crtc_state);  in nv50_outp_atomic_fix_depth()  local
372 	struct drm_display_mode *mode = &asyh->state.adjusted_mode;  in nv50_outp_atomic_fix_depth()
380 		asyh->or.bpc = min_t(u8, asyh->or.bpc, 10);  in nv50_outp_atomic_fix_depth()
383 		while (asyh->or.bpc > 6) {  in nv50_outp_atomic_fix_depth()
384 			mode_rate = DIV_ROUND_UP(mode->clock * asyh->or.bpc * 3, 8);  in nv50_outp_atomic_fix_depth()
388 			asyh->or.bpc -= 2;  in nv50_outp_atomic_fix_depth()
403 	struct nv50_head_atom *asyh = nv50_head_atom(crtc_state);  in nv50_outp_atomic_check()  local
412 		asyh->or.bpc = connector->display_info.bpc;  in nv50_outp_atomic_check()
488 	struct nv50_head_atom *asyh =  in nv50_dac_atomic_enable()  local
507 	core->func->dac->ctrl(core, nv_encoder->outp.or.id, ctrl, asyh);  in nv50_dac_atomic_enable()
508 	asyh->or.depth = 0;  in nv50_dac_atomic_enable()
948 	struct nv50_head_atom *asyh = nv50_head_atom(crtc_state);  in nv50_msto_atomic_check()  local
968 		asyh->or.bpc = connector->display_info.bpc;  in nv50_msto_atomic_check()
969 		asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3 << 4);  in nv50_msto_atomic_check()
983 	slots = drm_dp_atomic_find_time_slots(state, &mstm->mgr, mstc->port, asyh->dp.pbn);  in nv50_msto_atomic_check()
987 	asyh->dp.tu = slots;  in nv50_msto_atomic_check()
1008 	struct nv50_head_atom *asyh =  in nv50_msto_atomic_enable()  local
1039 	mstm->outp->update(mstm->outp, head->base.index, asyh, proto,  in nv50_msto_atomic_enable()
1040 			   nv50_dp_bpc_to_depth(asyh->or.bpc));  in nv50_msto_atomic_enable()
1510 		struct nv50_head_atom *asyh, u8 proto, u8 depth)  in nv50_sor_update()  argument
1515 	if (!asyh) {  in nv50_sor_update()
1522 		asyh->or.depth = depth;  in nv50_sor_update()
1525 	core->func->sor->ctrl(core, nv_encoder->outp.or.id, nv_encoder->ctrl, asyh);  in nv50_sor_update()
1577 	struct nv50_head_atom *asyh =  in nv50_sor_atomic_enable()  local
1579 	struct drm_display_mode *mode = &asyh->state.adjusted_mode;  in nv50_sor_atomic_enable()
1648 			if (asyh->or.bpc == 8)  in nv50_sor_atomic_enable()
1656 		depth = nv50_dp_bpc_to_depth(asyh->or.bpc);  in nv50_sor_atomic_enable()
1678 	nv_encoder->update(nv_encoder, nv_crtc->index, asyh, proto, depth);  in nv50_sor_atomic_enable()
1826 	struct nv50_head_atom *asyh =  in nv50_pior_atomic_enable()  local
1839 	switch (asyh->or.bpc) {  in nv50_pior_atomic_enable()
1840 	case 10: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_30_444; break;  in nv50_pior_atomic_enable()
1841 	case  8: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_444; break;  in nv50_pior_atomic_enable()
1842 	case  6: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_18_444; break;  in nv50_pior_atomic_enable()
1843 	default: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT; break;  in nv50_pior_atomic_enable()
1860 	core->func->pior->ctrl(core, nv_encoder->outp.or.id, ctrl, asyh);  in nv50_pior_atomic_enable()
2024 		struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);  in nv50_disp_atomic_commit_tail()  local
2028 			  asyh->clr.mask, asyh->set.mask);  in nv50_disp_atomic_commit_tail()
2035 		if (asyh->clr.mask) {  in nv50_disp_atomic_commit_tail()
2036 			nv50_head_flush_clr(head, asyh, atom->flush_disable);  in nv50_disp_atomic_commit_tail()
2115 		struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);  in nv50_disp_atomic_commit_tail()  local
2119 			  asyh->set.mask, asyh->clr.mask);  in nv50_disp_atomic_commit_tail()
2121 		if (asyh->set.mask) {  in nv50_disp_atomic_commit_tail()
2122 			nv50_head_flush_set(head, asyh);  in nv50_disp_atomic_commit_tail()
2166 		struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);  in nv50_disp_atomic_commit_tail()  local
2170 			  asyh->set.mask, asyh->clr.mask);  in nv50_disp_atomic_commit_tail()
2172 		if (asyh->set.mask) {  in nv50_disp_atomic_commit_tail()
2173 			nv50_head_flush_set_wndw(head, asyh);  in nv50_disp_atomic_commit_tail()
2402 	struct nv50_head_atom *asyh;  in nv50_disp_atomic_check()  local
2413 			asyh = nv50_head_atom(new_crtc_state);  in nv50_disp_atomic_check()
2414 			core->func->head->static_wndw_map(head, asyh);  in nv50_disp_atomic_check()