387 wr_cio_state(struct drm_device *dev, int head,  in wr_cio_state()  function
578 		wr_cio_state(dev, head, regp, i);  in nv_load_state_vga()
713 	wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC0_INDEX);  in nv_load_state_ext()
714 	wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX);  in nv_load_state_ext()
715 	wr_cio_state(dev, head, regp, NV_CIO_CRE_LSR_INDEX);  in nv_load_state_ext()
716 	wr_cio_state(dev, head, regp, NV_CIO_CRE_PIXEL_INDEX);  in nv_load_state_ext()
717 	wr_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);  in nv_load_state_ext()
718 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HEB__INDEX);  in nv_load_state_ext()
719 	wr_cio_state(dev, head, regp, NV_CIO_CRE_ENH_INDEX);  in nv_load_state_ext()
720 	wr_cio_state(dev, head, regp, NV_CIO_CRE_FF_INDEX);  in nv_load_state_ext()
721 	wr_cio_state(dev, head, regp, NV_CIO_CRE_FFLWM__INDEX);  in nv_load_state_ext()
724 		wr_cio_state(dev, head, regp, NV_CIO_CRE_47);  in nv_load_state_ext()
727 		wr_cio_state(dev, head, regp, 0x9f);  in nv_load_state_ext()
729 	wr_cio_state(dev, head, regp, NV_CIO_CRE_49);  in nv_load_state_ext()
730 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);  in nv_load_state_ext()
731 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);  in nv_load_state_ext()
732 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);  in nv_load_state_ext()
735 	wr_cio_state(dev, head, regp, NV_CIO_CRE_ILACE__INDEX);  in nv_load_state_ext()
737 	wr_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH3__INDEX);  in nv_load_state_ext()
738 	wr_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH4__INDEX);  in nv_load_state_ext()
740 		wr_cio_state(dev, head, regp, NV_CIO_CRE_EBR_INDEX);  in nv_load_state_ext()
741 		wr_cio_state(dev, head, regp, NV_CIO_CRE_CSB);  in nv_load_state_ext()
742 		wr_cio_state(dev, head, regp, NV_CIO_CRE_4B);  in nv_load_state_ext()
743 		wr_cio_state(dev, head, regp, NV_CIO_CRE_TVOUT_LATENCY);  in nv_load_state_ext()
760 		wr_cio_state(dev, head, regp, NV_CIO_CRE_42);  in nv_load_state_ext()
761 		wr_cio_state(dev, head, regp, NV_CIO_CRE_53);  in nv_load_state_ext()
762 		wr_cio_state(dev, head, regp, NV_CIO_CRE_54);  in nv_load_state_ext()
766 		wr_cio_state(dev, head, regp, NV_CIO_CRE_59);  in nv_load_state_ext()
767 		wr_cio_state(dev, head, regp, NV_CIO_CRE_5B);  in nv_load_state_ext()
769 		wr_cio_state(dev, head, regp, NV_CIO_CRE_85);  in nv_load_state_ext()
770 		wr_cio_state(dev, head, regp, NV_CIO_CRE_86);  in nv_load_state_ext()