199 	struct nv_sim_state sim_data;  in nv04_update_arb()  local
205 	sim_data.pclk_khz = VClk;  in nv04_update_arb()
206 	sim_data.mclk_khz = MClk;  in nv04_update_arb()
207 	sim_data.nvclk_khz = NVClk;  in nv04_update_arb()
208 	sim_data.bpp = bpp;  in nv04_update_arb()
209 	sim_data.two_heads = nv_two_heads(dev);  in nv04_update_arb()
218 		sim_data.memory_type = (type >> 12) & 1;  in nv04_update_arb()
219 		sim_data.memory_width = 64;  in nv04_update_arb()
220 		sim_data.mem_latency = 3;  in nv04_update_arb()
221 		sim_data.mem_page_miss = 10;  in nv04_update_arb()
223 		sim_data.memory_type = nvif_rd32(device, NV04_PFB_CFG0) & 0x1;  in nv04_update_arb()
224 		sim_data.memory_width = (nvif_rd32(device, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64;  in nv04_update_arb()
225 		sim_data.mem_latency = cfg1 & 0xf;  in nv04_update_arb()
226 		sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1);  in nv04_update_arb()
230 		nv04_calc_arb(&fifo_data, &sim_data);  in nv04_update_arb()
232 		nv10_calc_arb(&fifo_data, &sim_data);  in nv04_update_arb()