33 struct msm_mdss {  struct
51 					    struct msm_mdss *msm_mdss)  in msm_mdss_parse_data_bus_icc_path()  argument
61 	msm_mdss->mdp_path[0] = path0;  in msm_mdss_parse_data_bus_icc_path()
62 	msm_mdss->num_mdp_paths = 1;  in msm_mdss_parse_data_bus_icc_path()
66 		msm_mdss->mdp_path[1] = path1;  in msm_mdss_parse_data_bus_icc_path()
67 		msm_mdss->num_mdp_paths++;  in msm_mdss_parse_data_bus_icc_path()
72 		msm_mdss->reg_bus_path = reg_bus_path;  in msm_mdss_parse_data_bus_icc_path()
77 static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw)  in msm_mdss_icc_request_bw()  argument
81 	for (i = 0; i < msm_mdss->num_mdp_paths; i++)  in msm_mdss_icc_request_bw()
82 		icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw));  in msm_mdss_icc_request_bw()
87 	struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc);  in msm_mdss_irq()  local
93 	interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);  in msm_mdss_irq()
99 		rc = generic_handle_domain_irq(msm_mdss->irq_controller.domain,  in msm_mdss_irq()
102 			dev_err(msm_mdss->dev, "handle irq fail: irq=%lu rc=%d\n",  in msm_mdss_irq()
115 	struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);  in msm_mdss_irq_mask()  local
119 	clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);  in msm_mdss_irq_mask()
126 	struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);  in msm_mdss_irq_unmask()  local
130 	set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);  in msm_mdss_irq_unmask()
146 	struct msm_mdss *msm_mdss = domain->host_data;  in msm_mdss_irqdomain_map()  local
151 	return irq_set_chip_data(irq, msm_mdss);  in msm_mdss_irqdomain_map()
159 static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)  in _msm_mdss_irq_domain_add()  argument
164 	dev = msm_mdss->dev;  in _msm_mdss_irq_domain_add()
167 			&msm_mdss_irqdomain_ops, msm_mdss);  in _msm_mdss_irq_domain_add()
173 	msm_mdss->irq_controller.enabled_mask = 0;  in _msm_mdss_irq_domain_add()
174 	msm_mdss->irq_controller.domain = domain;  in _msm_mdss_irq_domain_add()
179 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_20()  argument
181 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_20()
183 	writel_relaxed(data->ubwc_static, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_20()
186 static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_30()  argument
188 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_30()
199 	writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_30()
202 static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_40()  argument
204 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_40()
210 	writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_40()
213 		writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
214 		writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE);  in msm_mdss_setup_ubwc_dec_40()
217 			writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
219 			writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
220 		writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);  in msm_mdss_setup_ubwc_dec_40()
226 	struct msm_mdss *mdss;  in msm_mdss_get_mdss_data()
236 static int msm_mdss_enable(struct msm_mdss *msm_mdss)  in msm_mdss_enable()  argument
245 	msm_mdss_icc_request_bw(msm_mdss, MIN_IB_BW);  in msm_mdss_enable()
247 	if (msm_mdss->mdss_data && msm_mdss->mdss_data->reg_bus_bw)  in msm_mdss_enable()
248 		icc_set_bw(msm_mdss->reg_bus_path, 0,  in msm_mdss_enable()
249 			   msm_mdss->mdss_data->reg_bus_bw);  in msm_mdss_enable()
251 		icc_set_bw(msm_mdss->reg_bus_path, 0,  in msm_mdss_enable()
254 	ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);  in msm_mdss_enable()
256 		dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret);  in msm_mdss_enable()
264 	if (msm_mdss->is_mdp5 || !msm_mdss->mdss_data)  in msm_mdss_enable()
274 	switch (msm_mdss->mdss_data->ubwc_dec_version) {  in msm_mdss_enable()
280 		msm_mdss_setup_ubwc_dec_20(msm_mdss);  in msm_mdss_enable()
283 		msm_mdss_setup_ubwc_dec_30(msm_mdss);  in msm_mdss_enable()
287 		msm_mdss_setup_ubwc_dec_40(msm_mdss);  in msm_mdss_enable()
290 		dev_err(msm_mdss->dev, "Unsupported UBWC decoder version %x\n",  in msm_mdss_enable()
291 			msm_mdss->mdss_data->ubwc_dec_version);  in msm_mdss_enable()
292 		dev_err(msm_mdss->dev, "HW_REV: 0x%x\n",  in msm_mdss_enable()
293 			readl_relaxed(msm_mdss->mmio + HW_REV));  in msm_mdss_enable()
294 		dev_err(msm_mdss->dev, "UBWC_DEC_HW_VERSION: 0x%x\n",  in msm_mdss_enable()
295 			readl_relaxed(msm_mdss->mmio + UBWC_DEC_HW_VERSION));  in msm_mdss_enable()
302 static int msm_mdss_disable(struct msm_mdss *msm_mdss)  in msm_mdss_disable()  argument
304 	clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);  in msm_mdss_disable()
305 	msm_mdss_icc_request_bw(msm_mdss, 0);  in msm_mdss_disable()
307 	if (msm_mdss->reg_bus_path)  in msm_mdss_disable()
308 		icc_set_bw(msm_mdss->reg_bus_path, 0, 0);  in msm_mdss_disable()
313 static void msm_mdss_destroy(struct msm_mdss *msm_mdss)  in msm_mdss_destroy()  argument
315 	struct platform_device *pdev = to_platform_device(msm_mdss->dev);  in msm_mdss_destroy()
318 	pm_runtime_suspend(msm_mdss->dev);  in msm_mdss_destroy()
319 	pm_runtime_disable(msm_mdss->dev);  in msm_mdss_destroy()
320 	irq_domain_remove(msm_mdss->irq_controller.domain);  in msm_mdss_destroy()
321 	msm_mdss->irq_controller.domain = NULL;  in msm_mdss_destroy()
382 static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)  in msm_mdss_init()
384 	struct msm_mdss *msm_mdss;  in msm_mdss_init()  local
392 	msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);  in msm_mdss_init()
393 	if (!msm_mdss)  in msm_mdss_init()
396 	msm_mdss->mdss_data = of_device_get_match_data(&pdev->dev);  in msm_mdss_init()
398 	msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss");  in msm_mdss_init()
399 	if (IS_ERR(msm_mdss->mmio))  in msm_mdss_init()
400 		return ERR_CAST(msm_mdss->mmio);  in msm_mdss_init()
402 	dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio);  in msm_mdss_init()
404 	ret = msm_mdss_parse_data_bus_icc_path(&pdev->dev, msm_mdss);  in msm_mdss_init()
409 		ret = mdp5_mdss_parse_clock(pdev, &msm_mdss->clocks);  in msm_mdss_init()
411 		ret = devm_clk_bulk_get_all(&pdev->dev, &msm_mdss->clocks);  in msm_mdss_init()
416 	msm_mdss->num_clocks = ret;  in msm_mdss_init()
417 	msm_mdss->is_mdp5 = is_mdp5;  in msm_mdss_init()
419 	msm_mdss->dev = &pdev->dev;  in msm_mdss_init()
425 	ret = _msm_mdss_irq_domain_add(msm_mdss);  in msm_mdss_init()
430 					 msm_mdss);  in msm_mdss_init()
434 	return msm_mdss;  in msm_mdss_init()
439 	struct msm_mdss *mdss = dev_get_drvdata(dev);  in mdss_runtime_suspend()
448 	struct msm_mdss *mdss = dev_get_drvdata(dev);  in mdss_runtime_resume()
479 	struct msm_mdss *mdss;  in mdss_probe()
508 	struct msm_mdss *mdss = platform_get_drvdata(pdev);  in mdss_remove()