Lines Matching refs:i1
332 …t REG_MDP5_IGC_LUT(enum mdp5_igc_type i0, uint32_t i1) { return 0x00000000 + __offset_IGC(i0) + 0x… in REG_MDP5_IGC_LUT() argument
334 …G_MDP5_IGC_LUT_REG(enum mdp5_igc_type i0, uint32_t i1) { return 0x00000000 + __offset_IGC(i0) + 0x… in REG_MDP5_IGC_LUT_REG() argument
385 …2_t REG_MDP5_CTL_LAYER(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset… in REG_MDP5_CTL_LAYER() argument
387 …REG_MDP5_CTL_LAYER_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset… in REG_MDP5_CTL_LAYER_REG() argument
520 …G_MDP5_CTL_LAYER_EXT(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset_L… in REG_MDP5_CTL_LAYER_EXT() argument
522 …P5_CTL_LAYER_EXT_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset_L… in REG_MDP5_CTL_LAYER_EXT_REG() argument
652 …_PIPE_CSC_1_PRE_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP() argument
654 …E_CSC_1_PRE_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP_REG() argument
668 …PIPE_CSC_1_POST_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_CLAMP() argument
670 …_CSC_1_POST_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_CLAMP_REG() argument
684 …5_PIPE_CSC_1_PRE_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_BIAS() argument
686 …PE_CSC_1_PRE_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_BIAS_REG() argument
694 …_PIPE_CSC_1_POST_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_BIAS() argument
696 …E_CSC_1_POST_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_BIAS_REG() argument
954 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000000 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT() argument
956 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000000 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT_LR() argument
982 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000004 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT_TB() argument
1008 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000008 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT_REQ_PIXELS() argument
1129 …t32_t REG_MDP5_LM_BLEND(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND() argument
1131 …G_MDP5_LM_BLEND_OP_MODE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_OP_MODE() argument
1153 …_MDP5_LM_BLEND_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_ALPHA() argument
1155 …_MDP5_LM_BLEND_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_ALPHA() argument
1157 …LM_BLEND_FG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000c + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_LOW0() argument
1159 …LM_BLEND_FG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000010 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_LOW1() argument
1161 …M_BLEND_FG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000014 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0() argument
1163 …M_BLEND_FG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000018 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1() argument
1165 …LM_BLEND_BG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000001c + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_LOW0() argument
1167 …LM_BLEND_BG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000020 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_LOW1() argument
1169 …M_BLEND_BG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000024 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_HIGH0() argument
1171 …M_BLEND_BG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000028 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_HIGH1() argument
1702 …EG_MDP5_WB_CSC_COMP_PRECLAMP(uint32_t i0, uint32_t i1) { return 0x00000274 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PRECLAMP() argument
1704 …DP5_WB_CSC_COMP_PRECLAMP_REG(uint32_t i0, uint32_t i1) { return 0x00000274 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PRECLAMP_REG() argument
1718 …G_MDP5_WB_CSC_COMP_POSTCLAMP(uint32_t i0, uint32_t i1) { return 0x00000280 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTCLAMP() argument
1720 …P5_WB_CSC_COMP_POSTCLAMP_REG(uint32_t i0, uint32_t i1) { return 0x00000280 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTCLAMP_REG() argument
1734 …REG_MDP5_WB_CSC_COMP_PREBIAS(uint32_t i0, uint32_t i1) { return 0x0000028c + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PREBIAS() argument
1736 …MDP5_WB_CSC_COMP_PREBIAS_REG(uint32_t i0, uint32_t i1) { return 0x0000028c + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PREBIAS_REG() argument
1744 …EG_MDP5_WB_CSC_COMP_POSTBIAS(uint32_t i0, uint32_t i1) { return 0x00000298 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTBIAS() argument
1746 …DP5_WB_CSC_COMP_POSTBIAS_REG(uint32_t i0, uint32_t i1) { return 0x00000298 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTBIAS_REG() argument