Lines Matching defs:i1

360 static inline uint32_t REG_MDP4_OVLP_STAGE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset…  in REG_MDP4_OVLP_STAGE()
362 static inline uint32_t REG_MDP4_OVLP_STAGE_OP(uint32_t i0, uint32_t i1) { return 0x00000000 + __off… in REG_MDP4_OVLP_STAGE_OP()
382 static inline uint32_t REG_MDP4_OVLP_STAGE_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 +… in REG_MDP4_OVLP_STAGE_FG_ALPHA()
384 static inline uint32_t REG_MDP4_OVLP_STAGE_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 +… in REG_MDP4_OVLP_STAGE_BG_ALPHA()
386 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000… in REG_MDP4_OVLP_STAGE_TRANSP_LOW0()
388 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x0000001… in REG_MDP4_OVLP_STAGE_TRANSP_LOW1()
390 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x000000… in REG_MDP4_OVLP_STAGE_TRANSP_HIGH0()
392 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x000000… in REG_MDP4_OVLP_STAGE_TRANSP_HIGH1()
404 static inline uint32_t REG_MDP4_OVLP_STAGE_CO3(uint32_t i0, uint32_t i1) { return 0x00000000 + __of… in REG_MDP4_OVLP_STAGE_CO3()
406 static inline uint32_t REG_MDP4_OVLP_STAGE_CO3_SEL(uint32_t i0, uint32_t i1) { return 0x00000000 + … in REG_MDP4_OVLP_STAGE_CO3_SEL()
422 static inline uint32_t REG_MDP4_OVLP_CSC_MV(uint32_t i0, uint32_t i1) { return 0x00002400 + __offse… in REG_MDP4_OVLP_CSC_MV()
424 static inline uint32_t REG_MDP4_OVLP_CSC_MV_VAL(uint32_t i0, uint32_t i1) { return 0x00002400 + __o… in REG_MDP4_OVLP_CSC_MV_VAL()
426 static inline uint32_t REG_MDP4_OVLP_CSC_PRE_BV(uint32_t i0, uint32_t i1) { return 0x00002500 + __o… in REG_MDP4_OVLP_CSC_PRE_BV()
428 static inline uint32_t REG_MDP4_OVLP_CSC_PRE_BV_VAL(uint32_t i0, uint32_t i1) { return 0x00002500 +… in REG_MDP4_OVLP_CSC_PRE_BV_VAL()
430 static inline uint32_t REG_MDP4_OVLP_CSC_POST_BV(uint32_t i0, uint32_t i1) { return 0x00002580 + __… in REG_MDP4_OVLP_CSC_POST_BV()
432 static inline uint32_t REG_MDP4_OVLP_CSC_POST_BV_VAL(uint32_t i0, uint32_t i1) { return 0x00002580 … in REG_MDP4_OVLP_CSC_POST_BV_VAL()
434 static inline uint32_t REG_MDP4_OVLP_CSC_PRE_LV(uint32_t i0, uint32_t i1) { return 0x00002600 + __o… in REG_MDP4_OVLP_CSC_PRE_LV()
436 static inline uint32_t REG_MDP4_OVLP_CSC_PRE_LV_VAL(uint32_t i0, uint32_t i1) { return 0x00002600 +… in REG_MDP4_OVLP_CSC_PRE_LV_VAL()
438 static inline uint32_t REG_MDP4_OVLP_CSC_POST_LV(uint32_t i0, uint32_t i1) { return 0x00002680 + __… in REG_MDP4_OVLP_CSC_POST_LV()
440 static inline uint32_t REG_MDP4_OVLP_CSC_POST_LV_VAL(uint32_t i0, uint32_t i1) { return 0x00002680 … in REG_MDP4_OVLP_CSC_POST_LV_VAL()
446 static inline uint32_t REG_MDP4_LUTN_LUT(uint32_t i0, uint32_t i1) { return 0x00094800 + 0x400*i0 +… in REG_MDP4_LUTN_LUT()
448 static inline uint32_t REG_MDP4_LUTN_LUT_VAL(uint32_t i0, uint32_t i1) { return 0x00094800 + 0x400*… in REG_MDP4_LUTN_LUT_VAL()
577 static inline uint32_t REG_MDP4_DMA_CSC_MV(enum mdp4_dma i0, uint32_t i1) { return 0x00003400 + __o… in REG_MDP4_DMA_CSC_MV()
579 static inline uint32_t REG_MDP4_DMA_CSC_MV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003400 +… in REG_MDP4_DMA_CSC_MV_VAL()
581 static inline uint32_t REG_MDP4_DMA_CSC_PRE_BV(enum mdp4_dma i0, uint32_t i1) { return 0x00003500 +… in REG_MDP4_DMA_CSC_PRE_BV()
583 static inline uint32_t REG_MDP4_DMA_CSC_PRE_BV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x000035… in REG_MDP4_DMA_CSC_PRE_BV_VAL()
585 static inline uint32_t REG_MDP4_DMA_CSC_POST_BV(enum mdp4_dma i0, uint32_t i1) { return 0x00003580 … in REG_MDP4_DMA_CSC_POST_BV()
587 static inline uint32_t REG_MDP4_DMA_CSC_POST_BV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003… in REG_MDP4_DMA_CSC_POST_BV_VAL()
589 static inline uint32_t REG_MDP4_DMA_CSC_PRE_LV(enum mdp4_dma i0, uint32_t i1) { return 0x00003600 +… in REG_MDP4_DMA_CSC_PRE_LV()
591 static inline uint32_t REG_MDP4_DMA_CSC_PRE_LV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x000036… in REG_MDP4_DMA_CSC_PRE_LV_VAL()
593 static inline uint32_t REG_MDP4_DMA_CSC_POST_LV(enum mdp4_dma i0, uint32_t i1) { return 0x00003680 … in REG_MDP4_DMA_CSC_POST_LV()
595 static inline uint32_t REG_MDP4_DMA_CSC_POST_LV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003… in REG_MDP4_DMA_CSC_POST_LV_VAL()
828 static inline uint32_t REG_MDP4_PIPE_CSC_MV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024400 + 0… in REG_MDP4_PIPE_CSC_MV()
830 static inline uint32_t REG_MDP4_PIPE_CSC_MV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024400… in REG_MDP4_PIPE_CSC_MV_VAL()
832 static inline uint32_t REG_MDP4_PIPE_CSC_PRE_BV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024500… in REG_MDP4_PIPE_CSC_PRE_BV()
834 static inline uint32_t REG_MDP4_PIPE_CSC_PRE_BV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x0002… in REG_MDP4_PIPE_CSC_PRE_BV_VAL()
836 static inline uint32_t REG_MDP4_PIPE_CSC_POST_BV(enum mdp4_pipe i0, uint32_t i1) { return 0x0002458… in REG_MDP4_PIPE_CSC_POST_BV()
838 static inline uint32_t REG_MDP4_PIPE_CSC_POST_BV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x000… in REG_MDP4_PIPE_CSC_POST_BV_VAL()
840 static inline uint32_t REG_MDP4_PIPE_CSC_PRE_LV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024600… in REG_MDP4_PIPE_CSC_PRE_LV()
842 static inline uint32_t REG_MDP4_PIPE_CSC_PRE_LV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x0002… in REG_MDP4_PIPE_CSC_PRE_LV_VAL()
844 static inline uint32_t REG_MDP4_PIPE_CSC_POST_LV(enum mdp4_pipe i0, uint32_t i1) { return 0x0002468… in REG_MDP4_PIPE_CSC_POST_LV()
846 static inline uint32_t REG_MDP4_PIPE_CSC_POST_LV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x000… in REG_MDP4_PIPE_CSC_POST_LV_VAL()