Lines Matching refs:DPU_SSPP_SCALER_QSEED4
34 (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4))
356 _VIG_SBLK(4, DPU_SSPP_SCALER_QSEED4,
360 _VIG_SBLK_ROT(4, DPU_SSPP_SCALER_QSEED4,
365 _VIG_SBLK(2, DPU_SSPP_SCALER_QSEED4,
373 _VIG_SBLK(5, DPU_SSPP_SCALER_QSEED4,
376 _VIG_SBLK(6, DPU_SSPP_SCALER_QSEED4,
379 _VIG_SBLK(7, DPU_SSPP_SCALER_QSEED4,
382 _VIG_SBLK(8, DPU_SSPP_SCALER_QSEED4,
386 _VIG_SBLK(5, DPU_SSPP_SCALER_QSEED4,
389 _VIG_SBLK(6, DPU_SSPP_SCALER_QSEED4,
392 _VIG_SBLK(7, DPU_SSPP_SCALER_QSEED4,
395 _VIG_SBLK(8, DPU_SSPP_SCALER_QSEED4,
399 _VIG_SBLK(7, DPU_SSPP_SCALER_QSEED4,
402 _VIG_SBLK(8, DPU_SSPP_SCALER_QSEED4,
405 _VIG_SBLK(9, DPU_SSPP_SCALER_QSEED4,
408 _VIG_SBLK(10, DPU_SSPP_SCALER_QSEED4,