51 	struct dpu_encoder_phys_cmd *cmd_enc =  in _dpu_encoder_phys_cmd_update_intf_cfg()  local
63 	intf_cfg.stream_sel = cmd_enc->stream_sel;  in _dpu_encoder_phys_cmd_update_intf_cfg()
111 	struct dpu_encoder_phys_cmd *cmd_enc;  in dpu_encoder_phys_cmd_te_rd_ptr_irq()  local
122 	cmd_enc = to_dpu_encoder_phys_cmd(phys_enc);  in dpu_encoder_phys_cmd_te_rd_ptr_irq()
126 	atomic_add_unless(&cmd_enc->pending_vblank_cnt, -1, 0);  in dpu_encoder_phys_cmd_te_rd_ptr_irq()
127 	wake_up_all(&cmd_enc->pending_vblank_wq);  in dpu_encoder_phys_cmd_te_rd_ptr_irq()
171 	struct dpu_encoder_phys_cmd *cmd_enc =  in _dpu_encoder_phys_cmd_handle_ppdone_timeout()  local
182 	cmd_enc->pp_timeout_report_cnt++;  in _dpu_encoder_phys_cmd_handle_ppdone_timeout()
183 	if (cmd_enc->pp_timeout_report_cnt == PP_TIMEOUT_MAX_TRIALS) {  in _dpu_encoder_phys_cmd_handle_ppdone_timeout()
186 	} else if (cmd_enc->pp_timeout_report_cnt == 1) {  in _dpu_encoder_phys_cmd_handle_ppdone_timeout()
192 		     cmd_enc->pp_timeout_report_cnt,  in _dpu_encoder_phys_cmd_handle_ppdone_timeout()
202 			  cmd_enc->pp_timeout_report_cnt,  in _dpu_encoder_phys_cmd_handle_ppdone_timeout()
222 	struct dpu_encoder_phys_cmd *cmd_enc =  in _dpu_encoder_phys_cmd_wait_for_idle()  local
238 		cmd_enc->pp_timeout_report_cnt = 0;  in _dpu_encoder_phys_cmd_wait_for_idle()
330 	struct dpu_encoder_phys_cmd *cmd_enc =  in dpu_encoder_phys_cmd_tearcheck_config()  local
341 			DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");  in dpu_encoder_phys_cmd_tearcheck_config()
345 		DPU_DEBUG_CMDENC(cmd_enc, "");  in dpu_encoder_phys_cmd_tearcheck_config()
349 			DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");  in dpu_encoder_phys_cmd_tearcheck_config()
353 		DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);  in dpu_encoder_phys_cmd_tearcheck_config()
371 		DPU_DEBUG_CMDENC(cmd_enc, "invalid - no vsync clock\n");  in dpu_encoder_phys_cmd_tearcheck_config()
390 	DPU_DEBUG_CMDENC(cmd_enc,  in dpu_encoder_phys_cmd_tearcheck_config()
393 	DPU_DEBUG_CMDENC(cmd_enc,  in dpu_encoder_phys_cmd_tearcheck_config()
396 	DPU_DEBUG_CMDENC(cmd_enc,  in dpu_encoder_phys_cmd_tearcheck_config()
400 	DPU_DEBUG_CMDENC(cmd_enc,  in dpu_encoder_phys_cmd_tearcheck_config()
414 	struct dpu_encoder_phys_cmd *cmd_enc =  in _dpu_encoder_phys_cmd_pingpong_config()  local
422 	DPU_DEBUG_CMDENC(cmd_enc, "pp %d, enabling mode:\n",  in _dpu_encoder_phys_cmd_pingpong_config()
460 	struct dpu_encoder_phys_cmd *cmd_enc =  in dpu_encoder_phys_cmd_enable()  local
468 	DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);  in dpu_encoder_phys_cmd_enable()
527 	struct dpu_encoder_phys_cmd *cmd_enc =  in dpu_encoder_phys_cmd_disable()  local
532 		DPU_ERROR_CMDENC(cmd_enc, "already disabled\n");  in dpu_encoder_phys_cmd_disable()
572 	struct dpu_encoder_phys_cmd *cmd_enc =  in dpu_encoder_phys_cmd_prepare_for_kickoff()  local
599 	DPU_DEBUG_CMDENC(cmd_enc, "pp:%d pending_cnt %d\n",  in dpu_encoder_phys_cmd_prepare_for_kickoff()
634 	struct dpu_encoder_phys_cmd *cmd_enc =  in _dpu_encoder_phys_cmd_wait_for_ctl_start()  local
648 		DPU_ERROR_CMDENC(cmd_enc, "ctl start interrupt wait failed\n");  in _dpu_encoder_phys_cmd_wait_for_ctl_start()
724 	struct dpu_encoder_phys_cmd *cmd_enc = NULL;  in dpu_encoder_phys_cmd_init()  local
728 	cmd_enc = drmm_kzalloc(dev, sizeof(*cmd_enc), GFP_KERNEL);  in dpu_encoder_phys_cmd_init()
729 	if (!cmd_enc) {  in dpu_encoder_phys_cmd_init()
733 	phys_enc = &cmd_enc->base;  in dpu_encoder_phys_cmd_init()
739 	cmd_enc->stream_sel = 0;  in dpu_encoder_phys_cmd_init()
744 	atomic_set(&cmd_enc->pending_vblank_cnt, 0);  in dpu_encoder_phys_cmd_init()
745 	init_waitqueue_head(&cmd_enc->pending_vblank_wq);  in dpu_encoder_phys_cmd_init()
747 	DPU_DEBUG_CMDENC(cmd_enc, "created\n");  in dpu_encoder_phys_cmd_init()