144 	if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu))  in a6xx_crashdumper_run()
775 /* Read a block of GMU registers */
784 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;  in _a6xx_get_gmu_registers()  local
804 				val = gmu_read_rscc(gmu, offset);  in _a6xx_get_gmu_registers()
806 				val = gmu_read(gmu, offset);  in _a6xx_get_gmu_registers()
827 	/* Get the CX GMU registers from AHB */  in a6xx_get_gmu_registers()
833 	if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu))  in a6xx_get_gmu_registers()
871 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;  in a6xx_snapshot_gmu_hfi_history()  local
874 	BUILD_BUG_ON(ARRAY_SIZE(gmu->queues) != ARRAY_SIZE(a6xx_state->hfi_queue_history));  in a6xx_snapshot_gmu_hfi_history()
876 	for (i = 0; i < ARRAY_SIZE(gmu->queues); i++) {  in a6xx_snapshot_gmu_hfi_history()
877 		struct a6xx_hfi_queue *queue = &gmu->queues[i];  in a6xx_snapshot_gmu_hfi_history()
1047 		a6xx_state->gmu_log = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.log);  in a6xx_gpu_state_get()
1048 		a6xx_state->gmu_hfi = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.hfi);  in a6xx_gpu_state_get()
1049 		a6xx_state->gmu_debug = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.debug);  in a6xx_gpu_state_get()
1055 	if (!adreno_has_gmu_wrapper(adreno_gpu) && !a6xx_gmu_gx_is_on(&a6xx_gpu->gmu))  in a6xx_gpu_state_get()
1324 	drm_puts(p, "gmu-log:\n");  in a6xx_show()
1334 	drm_puts(p, "gmu-hfi:\n");  in a6xx_show()
1352 	drm_puts(p, "gmu-debug:\n");  in a6xx_show()
1373 	drm_puts(p, "registers-gmu:\n");  in a6xx_show()