Lines Matching refs:a6xx_gpu
15 struct a6xx_gpu { struct
38 #define to_a6xx_gpu(x) container_of(x, struct a6xx_gpu, base) argument
65 static inline void a6xx_llc_rmw(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 mask, u32 or) in a6xx_llc_rmw() argument
67 return msm_rmw(a6xx_gpu->llc_mmio + (reg << 2), mask, or); in a6xx_llc_rmw()
70 static inline u32 a6xx_llc_read(struct a6xx_gpu *a6xx_gpu, u32 reg) in a6xx_llc_read() argument
72 return msm_readl(a6xx_gpu->llc_mmio + (reg << 2)); in a6xx_llc_read()
75 static inline void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value) in a6xx_llc_write() argument
77 msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2)); in a6xx_llc_write()
83 int a6xx_gmu_resume(struct a6xx_gpu *gpu);
84 int a6xx_gmu_stop(struct a6xx_gpu *gpu);
93 int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node);
94 int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node);
95 void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu);