14 static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p)  in pfp_print()  argument
21 		gpu_write(gpu, REG_A5XX_CP_PFP_STAT_ADDR, i);  in pfp_print()
23 			gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA));  in pfp_print()
27 static void me_print(struct msm_gpu *gpu, struct drm_printer *p)  in me_print()  argument
34 		gpu_write(gpu, REG_A5XX_CP_ME_STAT_ADDR, i);  in me_print()
36 			gpu_read(gpu, REG_A5XX_CP_ME_STAT_DATA));  in me_print()
40 static void meq_print(struct msm_gpu *gpu, struct drm_printer *p)  in meq_print()  argument
45 	gpu_write(gpu, REG_A5XX_CP_MEQ_DBG_ADDR, 0);  in meq_print()
49 			gpu_read(gpu, REG_A5XX_CP_MEQ_DBG_DATA));  in meq_print()
53 static void roq_print(struct msm_gpu *gpu, struct drm_printer *p)  in roq_print()  argument
58 	gpu_write(gpu, REG_A5XX_CP_ROQ_DBG_ADDR, 0);  in roq_print()
64 			val[j] = gpu_read(gpu, REG_A5XX_CP_ROQ_DBG_DATA);  in roq_print()
76 	void (*show)(struct msm_gpu *gpu, struct drm_printer *p) =  in show()
79 	show(priv->gpu, &p);  in show()
97 	struct msm_gpu *gpu = priv->gpu;  in reset_set()  local
98 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in reset_set()
110 	mutex_lock(&gpu->lock);  in reset_set()
119 		msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace);  in reset_set()
125 		msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace);  in reset_set()
130 	gpu->needs_hw_init = true;  in reset_set()
132 	pm_runtime_get_sync(&gpu->pdev->dev);  in reset_set()
133 	gpu->funcs->recover(gpu);  in reset_set()
135 	pm_runtime_put_sync(&gpu->pdev->dev);  in reset_set()
136 	mutex_unlock(&gpu->lock);  in reset_set()
144 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)  in a5xx_debugfs_init()  argument