1043 static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)  in A5XX_CP_PROTECT_REG_BASE_ADDR()  argument
1045 	return ((val) << A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A5XX_CP_PROTECT_REG_BASE_ADDR__MASK;  in A5XX_CP_PROTECT_REG_BASE_ADDR()
1049 static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)  in A5XX_CP_PROTECT_REG_MASK_LEN()  argument
1051 	return ((val) << A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A5XX_CP_PROTECT_REG_MASK_LEN__MASK;  in A5XX_CP_PROTECT_REG_MASK_LEN()
1055 static inline uint32_t A5XX_CP_PROTECT_REG_TRAP_WRITE(uint32_t val)  in A5XX_CP_PROTECT_REG_TRAP_WRITE()  argument
1057 	return ((val) << A5XX_CP_PROTECT_REG_TRAP_WRITE__SHIFT) & A5XX_CP_PROTECT_REG_TRAP_WRITE__MASK;  in A5XX_CP_PROTECT_REG_TRAP_WRITE()
1061 static inline uint32_t A5XX_CP_PROTECT_REG_TRAP_READ(uint32_t val)  in A5XX_CP_PROTECT_REG_TRAP_READ()  argument
1063 	return ((val) << A5XX_CP_PROTECT_REG_TRAP_READ__SHIFT) & A5XX_CP_PROTECT_REG_TRAP_READ__MASK;  in A5XX_CP_PROTECT_REG_TRAP_READ()
1838 static inline uint32_t A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB(uint32_t val)  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB()  argument
1840 …return ((val) << A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB__SHIFT) & A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB__MA…  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB()
1844 static inline uint32_t A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP(uint32_t val)  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP()  argument
1846 …return ((val) << A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP__SHIFT) & A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_…  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP()
1850 static inline uint32_t A5XX_RBBM_STATUS_HLSQ_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_HLSQ_BUSY()  argument
1852 	return ((val) << A5XX_RBBM_STATUS_HLSQ_BUSY__SHIFT) & A5XX_RBBM_STATUS_HLSQ_BUSY__MASK;  in A5XX_RBBM_STATUS_HLSQ_BUSY()
1856 static inline uint32_t A5XX_RBBM_STATUS_VSC_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VSC_BUSY()  argument
1858 	return ((val) << A5XX_RBBM_STATUS_VSC_BUSY__SHIFT) & A5XX_RBBM_STATUS_VSC_BUSY__MASK;  in A5XX_RBBM_STATUS_VSC_BUSY()
1862 static inline uint32_t A5XX_RBBM_STATUS_TPL1_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_TPL1_BUSY()  argument
1864 	return ((val) << A5XX_RBBM_STATUS_TPL1_BUSY__SHIFT) & A5XX_RBBM_STATUS_TPL1_BUSY__MASK;  in A5XX_RBBM_STATUS_TPL1_BUSY()
1868 static inline uint32_t A5XX_RBBM_STATUS_SP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_SP_BUSY()  argument
1870 	return ((val) << A5XX_RBBM_STATUS_SP_BUSY__SHIFT) & A5XX_RBBM_STATUS_SP_BUSY__MASK;  in A5XX_RBBM_STATUS_SP_BUSY()
1874 static inline uint32_t A5XX_RBBM_STATUS_UCHE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_UCHE_BUSY()  argument
1876 	return ((val) << A5XX_RBBM_STATUS_UCHE_BUSY__SHIFT) & A5XX_RBBM_STATUS_UCHE_BUSY__MASK;  in A5XX_RBBM_STATUS_UCHE_BUSY()
1880 static inline uint32_t A5XX_RBBM_STATUS_VPC_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VPC_BUSY()  argument
1882 	return ((val) << A5XX_RBBM_STATUS_VPC_BUSY__SHIFT) & A5XX_RBBM_STATUS_VPC_BUSY__MASK;  in A5XX_RBBM_STATUS_VPC_BUSY()
1886 static inline uint32_t A5XX_RBBM_STATUS_VFDP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VFDP_BUSY()  argument
1888 	return ((val) << A5XX_RBBM_STATUS_VFDP_BUSY__SHIFT) & A5XX_RBBM_STATUS_VFDP_BUSY__MASK;  in A5XX_RBBM_STATUS_VFDP_BUSY()
1892 static inline uint32_t A5XX_RBBM_STATUS_VFD_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VFD_BUSY()  argument
1894 	return ((val) << A5XX_RBBM_STATUS_VFD_BUSY__SHIFT) & A5XX_RBBM_STATUS_VFD_BUSY__MASK;  in A5XX_RBBM_STATUS_VFD_BUSY()
1898 static inline uint32_t A5XX_RBBM_STATUS_TESS_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_TESS_BUSY()  argument
1900 	return ((val) << A5XX_RBBM_STATUS_TESS_BUSY__SHIFT) & A5XX_RBBM_STATUS_TESS_BUSY__MASK;  in A5XX_RBBM_STATUS_TESS_BUSY()
1904 static inline uint32_t A5XX_RBBM_STATUS_PC_VSD_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_PC_VSD_BUSY()  argument
1906 	return ((val) << A5XX_RBBM_STATUS_PC_VSD_BUSY__SHIFT) & A5XX_RBBM_STATUS_PC_VSD_BUSY__MASK;  in A5XX_RBBM_STATUS_PC_VSD_BUSY()
1910 static inline uint32_t A5XX_RBBM_STATUS_PC_DCALL_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_PC_DCALL_BUSY()  argument
1912 	return ((val) << A5XX_RBBM_STATUS_PC_DCALL_BUSY__SHIFT) & A5XX_RBBM_STATUS_PC_DCALL_BUSY__MASK;  in A5XX_RBBM_STATUS_PC_DCALL_BUSY()
1916 static inline uint32_t A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY()  argument
1918 	return ((val) << A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY__SHIFT) & A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY__MASK;  in A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY()
1922 static inline uint32_t A5XX_RBBM_STATUS_DCOM_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_DCOM_BUSY()  argument
1924 	return ((val) << A5XX_RBBM_STATUS_DCOM_BUSY__SHIFT) & A5XX_RBBM_STATUS_DCOM_BUSY__MASK;  in A5XX_RBBM_STATUS_DCOM_BUSY()
1928 static inline uint32_t A5XX_RBBM_STATUS_COM_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_COM_BUSY()  argument
1930 	return ((val) << A5XX_RBBM_STATUS_COM_BUSY__SHIFT) & A5XX_RBBM_STATUS_COM_BUSY__MASK;  in A5XX_RBBM_STATUS_COM_BUSY()
1934 static inline uint32_t A5XX_RBBM_STATUS_LRZ_BUZY(uint32_t val)  in A5XX_RBBM_STATUS_LRZ_BUZY()  argument
1936 	return ((val) << A5XX_RBBM_STATUS_LRZ_BUZY__SHIFT) & A5XX_RBBM_STATUS_LRZ_BUZY__MASK;  in A5XX_RBBM_STATUS_LRZ_BUZY()
1940 static inline uint32_t A5XX_RBBM_STATUS_A2D_DSP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_A2D_DSP_BUSY()  argument
1942 	return ((val) << A5XX_RBBM_STATUS_A2D_DSP_BUSY__SHIFT) & A5XX_RBBM_STATUS_A2D_DSP_BUSY__MASK;  in A5XX_RBBM_STATUS_A2D_DSP_BUSY()
1946 static inline uint32_t A5XX_RBBM_STATUS_CCUFCHE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CCUFCHE_BUSY()  argument
1948 	return ((val) << A5XX_RBBM_STATUS_CCUFCHE_BUSY__SHIFT) & A5XX_RBBM_STATUS_CCUFCHE_BUSY__MASK;  in A5XX_RBBM_STATUS_CCUFCHE_BUSY()
1952 static inline uint32_t A5XX_RBBM_STATUS_RB_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_RB_BUSY()  argument
1954 	return ((val) << A5XX_RBBM_STATUS_RB_BUSY__SHIFT) & A5XX_RBBM_STATUS_RB_BUSY__MASK;  in A5XX_RBBM_STATUS_RB_BUSY()
1958 static inline uint32_t A5XX_RBBM_STATUS_RAS_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_RAS_BUSY()  argument
1960 	return ((val) << A5XX_RBBM_STATUS_RAS_BUSY__SHIFT) & A5XX_RBBM_STATUS_RAS_BUSY__MASK;  in A5XX_RBBM_STATUS_RAS_BUSY()
1964 static inline uint32_t A5XX_RBBM_STATUS_TSE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_TSE_BUSY()  argument
1966 	return ((val) << A5XX_RBBM_STATUS_TSE_BUSY__SHIFT) & A5XX_RBBM_STATUS_TSE_BUSY__MASK;  in A5XX_RBBM_STATUS_TSE_BUSY()
1970 static inline uint32_t A5XX_RBBM_STATUS_VBIF_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VBIF_BUSY()  argument
1972 	return ((val) << A5XX_RBBM_STATUS_VBIF_BUSY__SHIFT) & A5XX_RBBM_STATUS_VBIF_BUSY__MASK;  in A5XX_RBBM_STATUS_VBIF_BUSY()
1976 static inline uint32_t A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST(uint32_t val)  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST()  argument
1978 …return ((val) << A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST__SHIFT) & A5XX_RBBM_STATUS_GPU_BUSY_IGN_AH…  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST()
1982 static inline uint32_t A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST(uint32_t val)  in A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST()  argument
1984 …return ((val) << A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST__SHIFT) & A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST__MA…  in A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST()
1988 static inline uint32_t A5XX_RBBM_STATUS_CP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_BUSY()  argument
1990 	return ((val) << A5XX_RBBM_STATUS_CP_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_BUSY()
1994 static inline uint32_t A5XX_RBBM_STATUS_GPMU_MASTER_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_GPMU_MASTER_BUSY()  argument
1996 …return ((val) << A5XX_RBBM_STATUS_GPMU_MASTER_BUSY__SHIFT) & A5XX_RBBM_STATUS_GPMU_MASTER_BUSY__MA…  in A5XX_RBBM_STATUS_GPMU_MASTER_BUSY()
2000 static inline uint32_t A5XX_RBBM_STATUS_CP_CRASH_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_CRASH_BUSY()  argument
2002 	return ((val) << A5XX_RBBM_STATUS_CP_CRASH_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_CRASH_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_CRASH_BUSY()
2006 static inline uint32_t A5XX_RBBM_STATUS_CP_ETS_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_ETS_BUSY()  argument
2008 	return ((val) << A5XX_RBBM_STATUS_CP_ETS_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_ETS_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_ETS_BUSY()
2012 static inline uint32_t A5XX_RBBM_STATUS_CP_PFP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_PFP_BUSY()  argument
2014 	return ((val) << A5XX_RBBM_STATUS_CP_PFP_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_PFP_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_PFP_BUSY()
2018 static inline uint32_t A5XX_RBBM_STATUS_CP_ME_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_ME_BUSY()  argument
2020 	return ((val) << A5XX_RBBM_STATUS_CP_ME_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_ME_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_ME_BUSY()
2114 static inline uint32_t A5XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A5XX_VSC_BIN_SIZE_WIDTH()  argument
2116 	return ((val >> 5) << A5XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A5XX_VSC_BIN_SIZE_WIDTH__MASK;  in A5XX_VSC_BIN_SIZE_WIDTH()
2120 static inline uint32_t A5XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A5XX_VSC_BIN_SIZE_HEIGHT()  argument
2122 	return ((val >> 5) << A5XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A5XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A5XX_VSC_BIN_SIZE_HEIGHT()
2138 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_X()  argument
2140 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_X()
2144 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_Y()  argument
2146 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_Y()
2150 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_W()  argument
2152 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_W()
2156 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_H()  argument
2158 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_H()
2179 static inline uint32_t A5XX_VSC_RESOLVE_CNTL_X(uint32_t val)  in A5XX_VSC_RESOLVE_CNTL_X()  argument
2181 	return ((val) << A5XX_VSC_RESOLVE_CNTL_X__SHIFT) & A5XX_VSC_RESOLVE_CNTL_X__MASK;  in A5XX_VSC_RESOLVE_CNTL_X()
2185 static inline uint32_t A5XX_VSC_RESOLVE_CNTL_Y(uint32_t val)  in A5XX_VSC_RESOLVE_CNTL_Y()  argument
2187 	return ((val) << A5XX_VSC_RESOLVE_CNTL_Y__SHIFT) & A5XX_VSC_RESOLVE_CNTL_Y__MASK;  in A5XX_VSC_RESOLVE_CNTL_Y()
2817 static inline uint32_t A5XX_GRAS_VS_CL_CNTL_CLIP_MASK(uint32_t val)  in A5XX_GRAS_VS_CL_CNTL_CLIP_MASK()  argument
2819 	return ((val) << A5XX_GRAS_VS_CL_CNTL_CLIP_MASK__SHIFT) & A5XX_GRAS_VS_CL_CNTL_CLIP_MASK__MASK;  in A5XX_GRAS_VS_CL_CNTL_CLIP_MASK()
2823 static inline uint32_t A5XX_GRAS_VS_CL_CNTL_CULL_MASK(uint32_t val)  in A5XX_GRAS_VS_CL_CNTL_CULL_MASK()  argument
2825 	return ((val) << A5XX_GRAS_VS_CL_CNTL_CULL_MASK__SHIFT) & A5XX_GRAS_VS_CL_CNTL_CULL_MASK__MASK;  in A5XX_GRAS_VS_CL_CNTL_CULL_MASK()
2839 static inline uint32_t A5XX_GRAS_CNTL_COORD_MASK(uint32_t val)  in A5XX_GRAS_CNTL_COORD_MASK()  argument
2841 	return ((val) << A5XX_GRAS_CNTL_COORD_MASK__SHIFT) & A5XX_GRAS_CNTL_COORD_MASK__MASK;  in A5XX_GRAS_CNTL_COORD_MASK()
2847 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val)  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()  argument
2849 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HO…  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()
2853 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val)  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()  argument
2855 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VE…  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()
2861 static inline uint32_t A5XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_XOFFSET_0()  argument
2863 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_XOFFSET_0()
2869 static inline uint32_t A5XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_XSCALE_0()  argument
2871 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_XSCALE_0()
2877 static inline uint32_t A5XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_YOFFSET_0()  argument
2879 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_YOFFSET_0()
2885 static inline uint32_t A5XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_YSCALE_0()  argument
2887 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_YSCALE_0()
2893 static inline uint32_t A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
2895 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_ZOFFSET_0()
2901 static inline uint32_t A5XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_ZSCALE_0()  argument
2903 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_ZSCALE_0()
2912 static inline uint32_t A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val)  in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()  argument
2914 …return ((((int32_t)(val * 4.0))) << A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT) & A5XX_GRAS_SU_CNTL_LI…  in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()
2919 static inline uint32_t A5XX_GRAS_SU_CNTL_LINE_MODE(enum a5xx_line_mode val)  in A5XX_GRAS_SU_CNTL_LINE_MODE()  argument
2921 	return ((val) << A5XX_GRAS_SU_CNTL_LINE_MODE__SHIFT) & A5XX_GRAS_SU_CNTL_LINE_MODE__MASK;  in A5XX_GRAS_SU_CNTL_LINE_MODE()
2927 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A5XX_GRAS_SU_POINT_MINMAX_MIN()  argument
2929 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A5XX_GRAS_SU_POINT_M…  in A5XX_GRAS_SU_POINT_MINMAX_MIN()
2933 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A5XX_GRAS_SU_POINT_MINMAX_MAX()  argument
2935 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A5XX_GRAS_SU_POINT_M…  in A5XX_GRAS_SU_POINT_MINMAX_MAX()
2941 static inline uint32_t A5XX_GRAS_SU_POINT_SIZE(float val)  in A5XX_GRAS_SU_POINT_SIZE()  argument
2943 …return ((((int32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_SIZE__SHIFT) & A5XX_GRAS_SU_POINT_SIZE__MA…  in A5XX_GRAS_SU_POINT_SIZE()
2955 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A5XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
2957 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A5XX_GRAS_SU_POLY_OFFSET_SCALE()
2963 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
2965 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()
2971 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val)  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()  argument
2973 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFF…  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()
2979 static inline uint32_t A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)  in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()  argument
2981 …return ((val) << A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_GRAS_SU_DEPTH_BUFFER_I…  in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
2995 static inline uint32_t A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()  argument
2997 …return ((val) << A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__…  in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()
3003 static inline uint32_t A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()  argument
3005 …return ((val) << A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES…  in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()
3015 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()  argument
3017 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()
3021 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()  argument
3023 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()
3030 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()  argument
3032 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()
3036 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()  argument
3038 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()
3045 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()  argument
3047 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()
3051 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()  argument
3053 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()
3060 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()  argument
3062 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()
3066 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()  argument
3068 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()
3075 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
3077 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
3081 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
3083 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
3090 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
3092 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
3096 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
3098 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
3113 static inline uint32_t A5XX_GRAS_LRZ_BUFFER_PITCH(uint32_t val)  in A5XX_GRAS_LRZ_BUFFER_PITCH()  argument
3115 	return ((val >> 5) << A5XX_GRAS_LRZ_BUFFER_PITCH__SHIFT) & A5XX_GRAS_LRZ_BUFFER_PITCH__MASK;  in A5XX_GRAS_LRZ_BUFFER_PITCH()
3125 static inline uint32_t A5XX_RB_CNTL_WIDTH(uint32_t val)  in A5XX_RB_CNTL_WIDTH()  argument
3127 	return ((val >> 5) << A5XX_RB_CNTL_WIDTH__SHIFT) & A5XX_RB_CNTL_WIDTH__MASK;  in A5XX_RB_CNTL_WIDTH()
3131 static inline uint32_t A5XX_RB_CNTL_HEIGHT(uint32_t val)  in A5XX_RB_CNTL_HEIGHT()  argument
3133 	return ((val >> 5) << A5XX_RB_CNTL_HEIGHT__SHIFT) & A5XX_RB_CNTL_HEIGHT__MASK;  in A5XX_RB_CNTL_HEIGHT()
3145 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val)  in A5XX_RB_RENDER_CNTL_FLAG_MRTS()  argument
3147 	return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK;  in A5XX_RB_RENDER_CNTL_FLAG_MRTS()
3151 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val)  in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()  argument
3153 	return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK;  in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()
3159 static inline uint32_t A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()  argument
3161 	return ((val) << A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK;  in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()
3167 static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()  argument
3169 	return ((val) << A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK;  in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()
3182 static inline uint32_t A5XX_RB_RENDER_CONTROL0_COORD_MASK(uint32_t val)  in A5XX_RB_RENDER_CONTROL0_COORD_MASK()  argument
3184 …return ((val) << A5XX_RB_RENDER_CONTROL0_COORD_MASK__SHIFT) & A5XX_RB_RENDER_CONTROL0_COORD_MASK__…  in A5XX_RB_RENDER_CONTROL0_COORD_MASK()
3195 static inline uint32_t A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val)  in A5XX_RB_FS_OUTPUT_CNTL_MRT()  argument
3197 	return ((val) << A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK;  in A5XX_RB_FS_OUTPUT_CNTL_MRT()
3204 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT0()  argument
3206 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT0()
3210 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT1()  argument
3212 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT1()
3216 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT2()  argument
3218 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT2()
3222 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT3()  argument
3224 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT3()
3228 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT4()  argument
3230 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT4()
3234 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT5()  argument
3236 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT5()
3240 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT6()  argument
3242 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT6()
3246 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT7()  argument
3248 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT7()
3259 static inline uint32_t A5XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)  in A5XX_RB_MRT_CONTROL_ROP_CODE()  argument
3261 	return ((val) << A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A5XX_RB_MRT_CONTROL_ROP_CODE__MASK;  in A5XX_RB_MRT_CONTROL_ROP_CODE()
3265 static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
3267 …return ((val) << A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A5XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
3273 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
3275 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
3279 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
3281 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RG…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
3285 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
3287 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
3291 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
3293 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_AL…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
3297 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
3299 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
3303 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
3305 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_A…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
3311 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
3313 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
3317 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
3319 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
3323 static inline uint32_t A5XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A5XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
3325 	return ((val) << A5XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A5XX_RB_MRT_BUF_INFO_DITHER_MODE()
3329 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
3331 	return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()
3338 static inline uint32_t A5XX_RB_MRT_PITCH(uint32_t val)  in A5XX_RB_MRT_PITCH()  argument
3340 	return ((val >> 6) << A5XX_RB_MRT_PITCH__SHIFT) & A5XX_RB_MRT_PITCH__MASK;  in A5XX_RB_MRT_PITCH()
3346 static inline uint32_t A5XX_RB_MRT_ARRAY_PITCH(uint32_t val)  in A5XX_RB_MRT_ARRAY_PITCH()  argument
3348 	return ((val >> 6) << A5XX_RB_MRT_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_ARRAY_PITCH__MASK;  in A5XX_RB_MRT_ARRAY_PITCH()
3358 static inline uint32_t A5XX_RB_BLEND_RED_UINT(uint32_t val)  in A5XX_RB_BLEND_RED_UINT()  argument
3360 	return ((val) << A5XX_RB_BLEND_RED_UINT__SHIFT) & A5XX_RB_BLEND_RED_UINT__MASK;  in A5XX_RB_BLEND_RED_UINT()
3364 static inline uint32_t A5XX_RB_BLEND_RED_SINT(uint32_t val)  in A5XX_RB_BLEND_RED_SINT()  argument
3366 	return ((val) << A5XX_RB_BLEND_RED_SINT__SHIFT) & A5XX_RB_BLEND_RED_SINT__MASK;  in A5XX_RB_BLEND_RED_SINT()
3370 static inline uint32_t A5XX_RB_BLEND_RED_FLOAT(float val)  in A5XX_RB_BLEND_RED_FLOAT()  argument
3372 …return ((_mesa_float_to_half(val)) << A5XX_RB_BLEND_RED_FLOAT__SHIFT) & A5XX_RB_BLEND_RED_FLOAT__M…  in A5XX_RB_BLEND_RED_FLOAT()
3378 static inline uint32_t A5XX_RB_BLEND_RED_F32(float val)  in A5XX_RB_BLEND_RED_F32()  argument
3380 	return ((fui(val)) << A5XX_RB_BLEND_RED_F32__SHIFT) & A5XX_RB_BLEND_RED_F32__MASK;  in A5XX_RB_BLEND_RED_F32()
3386 static inline uint32_t A5XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A5XX_RB_BLEND_GREEN_UINT()  argument
3388 	return ((val) << A5XX_RB_BLEND_GREEN_UINT__SHIFT) & A5XX_RB_BLEND_GREEN_UINT__MASK;  in A5XX_RB_BLEND_GREEN_UINT()
3392 static inline uint32_t A5XX_RB_BLEND_GREEN_SINT(uint32_t val)  in A5XX_RB_BLEND_GREEN_SINT()  argument
3394 	return ((val) << A5XX_RB_BLEND_GREEN_SINT__SHIFT) & A5XX_RB_BLEND_GREEN_SINT__MASK;  in A5XX_RB_BLEND_GREEN_SINT()
3398 static inline uint32_t A5XX_RB_BLEND_GREEN_FLOAT(float val)  in A5XX_RB_BLEND_GREEN_FLOAT()  argument
3400 …return ((_mesa_float_to_half(val)) << A5XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A5XX_RB_BLEND_GREEN_FLOA…  in A5XX_RB_BLEND_GREEN_FLOAT()
3406 static inline uint32_t A5XX_RB_BLEND_GREEN_F32(float val)  in A5XX_RB_BLEND_GREEN_F32()  argument
3408 	return ((fui(val)) << A5XX_RB_BLEND_GREEN_F32__SHIFT) & A5XX_RB_BLEND_GREEN_F32__MASK;  in A5XX_RB_BLEND_GREEN_F32()
3414 static inline uint32_t A5XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A5XX_RB_BLEND_BLUE_UINT()  argument
3416 	return ((val) << A5XX_RB_BLEND_BLUE_UINT__SHIFT) & A5XX_RB_BLEND_BLUE_UINT__MASK;  in A5XX_RB_BLEND_BLUE_UINT()
3420 static inline uint32_t A5XX_RB_BLEND_BLUE_SINT(uint32_t val)  in A5XX_RB_BLEND_BLUE_SINT()  argument
3422 	return ((val) << A5XX_RB_BLEND_BLUE_SINT__SHIFT) & A5XX_RB_BLEND_BLUE_SINT__MASK;  in A5XX_RB_BLEND_BLUE_SINT()
3426 static inline uint32_t A5XX_RB_BLEND_BLUE_FLOAT(float val)  in A5XX_RB_BLEND_BLUE_FLOAT()  argument
3428 …return ((_mesa_float_to_half(val)) << A5XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A5XX_RB_BLEND_BLUE_FLOAT_…  in A5XX_RB_BLEND_BLUE_FLOAT()
3434 static inline uint32_t A5XX_RB_BLEND_BLUE_F32(float val)  in A5XX_RB_BLEND_BLUE_F32()  argument
3436 	return ((fui(val)) << A5XX_RB_BLEND_BLUE_F32__SHIFT) & A5XX_RB_BLEND_BLUE_F32__MASK;  in A5XX_RB_BLEND_BLUE_F32()
3442 static inline uint32_t A5XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A5XX_RB_BLEND_ALPHA_UINT()  argument
3444 	return ((val) << A5XX_RB_BLEND_ALPHA_UINT__SHIFT) & A5XX_RB_BLEND_ALPHA_UINT__MASK;  in A5XX_RB_BLEND_ALPHA_UINT()
3448 static inline uint32_t A5XX_RB_BLEND_ALPHA_SINT(uint32_t val)  in A5XX_RB_BLEND_ALPHA_SINT()  argument
3450 	return ((val) << A5XX_RB_BLEND_ALPHA_SINT__SHIFT) & A5XX_RB_BLEND_ALPHA_SINT__MASK;  in A5XX_RB_BLEND_ALPHA_SINT()
3454 static inline uint32_t A5XX_RB_BLEND_ALPHA_FLOAT(float val)  in A5XX_RB_BLEND_ALPHA_FLOAT()  argument
3456 …return ((_mesa_float_to_half(val)) << A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A5XX_RB_BLEND_ALPHA_FLOA…  in A5XX_RB_BLEND_ALPHA_FLOAT()
3462 static inline uint32_t A5XX_RB_BLEND_ALPHA_F32(float val)  in A5XX_RB_BLEND_ALPHA_F32()  argument
3464 	return ((fui(val)) << A5XX_RB_BLEND_ALPHA_F32__SHIFT) & A5XX_RB_BLEND_ALPHA_F32__MASK;  in A5XX_RB_BLEND_ALPHA_F32()
3470 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
3472 	return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()
3477 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
3479 …return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
3485 static inline uint32_t A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val)  in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()  argument
3487 	return ((val) << A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT) & A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK;  in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()
3493 static inline uint32_t A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val)  in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()  argument
3495 	return ((val) << A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT) & A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK;  in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()
3507 static inline uint32_t A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val)  in A5XX_RB_DEPTH_CNTL_ZFUNC()  argument
3509 	return ((val) << A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT) & A5XX_RB_DEPTH_CNTL_ZFUNC__MASK;  in A5XX_RB_DEPTH_CNTL_ZFUNC()
3516 static inline uint32_t A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)  in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()  argument
3518 …return ((val) << A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_…  in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
3528 static inline uint32_t A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val)  in A5XX_RB_DEPTH_BUFFER_PITCH()  argument
3530 	return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_PITCH__MASK;  in A5XX_RB_DEPTH_BUFFER_PITCH()
3536 static inline uint32_t A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val)  in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()  argument
3538 …return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH_…  in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()
3547 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A5XX_RB_STENCIL_CONTROL_FUNC()  argument
3549 	return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A5XX_RB_STENCIL_CONTROL_FUNC()
3553 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_FAIL()  argument
3555 	return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A5XX_RB_STENCIL_CONTROL_FAIL()
3559 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZPASS()  argument
3561 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A5XX_RB_STENCIL_CONTROL_ZPASS()
3565 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZFAIL()  argument
3567 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A5XX_RB_STENCIL_CONTROL_ZFAIL()
3571 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A5XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
3573 	return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_FUNC_BF()
3577 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
3579 	return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_FAIL_BF()
3583 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
3585 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()
3589 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
3591 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()
3604 static inline uint32_t A5XX_RB_STENCIL_PITCH(uint32_t val)  in A5XX_RB_STENCIL_PITCH()  argument
3606 	return ((val >> 6) << A5XX_RB_STENCIL_PITCH__SHIFT) & A5XX_RB_STENCIL_PITCH__MASK;  in A5XX_RB_STENCIL_PITCH()
3612 static inline uint32_t A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val)  in A5XX_RB_STENCIL_ARRAY_PITCH()  argument
3614 	return ((val >> 6) << A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT) & A5XX_RB_STENCIL_ARRAY_PITCH__MASK;  in A5XX_RB_STENCIL_ARRAY_PITCH()
3620 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILREF()  argument
3622 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILREF__MA…  in A5XX_RB_STENCILREFMASK_STENCILREF()
3626 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILMASK()  argument
3628 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILMASK__…  in A5XX_RB_STENCILREFMASK_STENCILMASK()
3632 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
3634 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILW…  in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()
3640 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
3642 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_BF_STENCILR…  in A5XX_RB_STENCILREFMASK_BF_STENCILREF()
3646 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
3648 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_BF_STENCIL…  in A5XX_RB_STENCILREFMASK_BF_STENCILMASK()
3652 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
3654 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_BF_ST…  in A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
3661 static inline uint32_t A5XX_RB_WINDOW_OFFSET_X(uint32_t val)  in A5XX_RB_WINDOW_OFFSET_X()  argument
3663 	return ((val) << A5XX_RB_WINDOW_OFFSET_X__SHIFT) & A5XX_RB_WINDOW_OFFSET_X__MASK;  in A5XX_RB_WINDOW_OFFSET_X()
3667 static inline uint32_t A5XX_RB_WINDOW_OFFSET_Y(uint32_t val)  in A5XX_RB_WINDOW_OFFSET_Y()  argument
3669 	return ((val) << A5XX_RB_WINDOW_OFFSET_Y__SHIFT) & A5XX_RB_WINDOW_OFFSET_Y__MASK;  in A5XX_RB_WINDOW_OFFSET_Y()
3678 static inline uint32_t A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val)  in A5XX_RB_BLIT_CNTL_BUF()  argument
3680 	return ((val) << A5XX_RB_BLIT_CNTL_BUF__SHIFT) & A5XX_RB_BLIT_CNTL_BUF__MASK;  in A5XX_RB_BLIT_CNTL_BUF()
3687 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_1_X()  argument
3689 	return ((val) << A5XX_RB_RESOLVE_CNTL_1_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_X__MASK;  in A5XX_RB_RESOLVE_CNTL_1_X()
3693 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_1_Y()  argument
3695 	return ((val) << A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_Y__MASK;  in A5XX_RB_RESOLVE_CNTL_1_Y()
3702 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_2_X()  argument
3704 	return ((val) << A5XX_RB_RESOLVE_CNTL_2_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_X__MASK;  in A5XX_RB_RESOLVE_CNTL_2_X()
3708 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_2_Y()  argument
3710 	return ((val) << A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_Y__MASK;  in A5XX_RB_RESOLVE_CNTL_2_Y()
3723 static inline uint32_t A5XX_RB_BLIT_DST_PITCH(uint32_t val)  in A5XX_RB_BLIT_DST_PITCH()  argument
3725 	return ((val >> 6) << A5XX_RB_BLIT_DST_PITCH__SHIFT) & A5XX_RB_BLIT_DST_PITCH__MASK;  in A5XX_RB_BLIT_DST_PITCH()
3731 static inline uint32_t A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val)  in A5XX_RB_BLIT_DST_ARRAY_PITCH()  argument
3733 	return ((val >> 6) << A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK;  in A5XX_RB_BLIT_DST_ARRAY_PITCH()
3749 static inline uint32_t A5XX_RB_CLEAR_CNTL_MASK(uint32_t val)  in A5XX_RB_CLEAR_CNTL_MASK()  argument
3751 	return ((val) << A5XX_RB_CLEAR_CNTL_MASK__SHIFT) & A5XX_RB_CLEAR_CNTL_MASK__MASK;  in A5XX_RB_CLEAR_CNTL_MASK()
3769 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val)  in A5XX_RB_MRT_FLAG_BUFFER_PITCH()  argument
3771 	return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK;  in A5XX_RB_MRT_FLAG_BUFFER_PITCH()
3777 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val)  in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()  argument
3779 …return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_ARRAY_…  in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()
3789 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val)  in A5XX_RB_BLIT_FLAG_DST_PITCH()  argument
3791 	return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_PITCH__MASK;  in A5XX_RB_BLIT_FLAG_DST_PITCH()
3797 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val)  in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()  argument
3799 …return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_ARRAY_PITC…  in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()
3809 static inline uint32_t A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val)  in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()  argument
3811 	return ((val) << A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT) & A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK;  in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()
3836 static inline uint32_t A5XX_VPC_CLIP_CNTL_CLIP_MASK(uint32_t val)  in A5XX_VPC_CLIP_CNTL_CLIP_MASK()  argument
3838 	return ((val) << A5XX_VPC_CLIP_CNTL_CLIP_MASK__SHIFT) & A5XX_VPC_CLIP_CNTL_CLIP_MASK__MASK;  in A5XX_VPC_CLIP_CNTL_CLIP_MASK()
3842 static inline uint32_t A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC(uint32_t val)  in A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC()  argument
3844 …return ((val) << A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC__SHIFT) & A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC…  in A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC()
3848 static inline uint32_t A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC(uint32_t val)  in A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC()  argument
3850 …return ((val) << A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC__SHIFT) & A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC…  in A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC()
3856 static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val)  in A5XX_VPC_PACK_NUMNONPOSVAR()  argument
3858 	return ((val) << A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT) & A5XX_VPC_PACK_NUMNONPOSVAR__MASK;  in A5XX_VPC_PACK_NUMNONPOSVAR()
3862 static inline uint32_t A5XX_VPC_PACK_PSIZELOC(uint32_t val)  in A5XX_VPC_PACK_PSIZELOC()  argument
3864 	return ((val) << A5XX_VPC_PACK_PSIZELOC__SHIFT) & A5XX_VPC_PACK_PSIZELOC__MASK;  in A5XX_VPC_PACK_PSIZELOC()
3885 static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val)  in A5XX_VPC_SO_PROG_A_BUF()  argument
3887 	return ((val) << A5XX_VPC_SO_PROG_A_BUF__SHIFT) & A5XX_VPC_SO_PROG_A_BUF__MASK;  in A5XX_VPC_SO_PROG_A_BUF()
3891 static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val)  in A5XX_VPC_SO_PROG_A_OFF()  argument
3893 	return ((val >> 2) << A5XX_VPC_SO_PROG_A_OFF__SHIFT) & A5XX_VPC_SO_PROG_A_OFF__MASK;  in A5XX_VPC_SO_PROG_A_OFF()
3898 static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val)  in A5XX_VPC_SO_PROG_B_BUF()  argument
3900 	return ((val) << A5XX_VPC_SO_PROG_B_BUF__SHIFT) & A5XX_VPC_SO_PROG_B_BUF__MASK;  in A5XX_VPC_SO_PROG_B_BUF()
3904 static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val)  in A5XX_VPC_SO_PROG_B_OFF()  argument
3906 	return ((val >> 2) << A5XX_VPC_SO_PROG_B_OFF__SHIFT) & A5XX_VPC_SO_PROG_B_OFF__MASK;  in A5XX_VPC_SO_PROG_B_OFF()
3929 static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val)  in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()  argument
3931 …return ((val) << A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT) & A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_V…  in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()
3943 static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE()  argument
3945 …return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_F…  in A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE()
3949 static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE()  argument
3951 …return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_BA…  in A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE()
3958 static inline uint32_t A5XX_PC_CLIP_CNTL_CLIP_MASK(uint32_t val)  in A5XX_PC_CLIP_CNTL_CLIP_MASK()  argument
3960 	return ((val) << A5XX_PC_CLIP_CNTL_CLIP_MASK__SHIFT) & A5XX_PC_CLIP_CNTL_CLIP_MASK__MASK;  in A5XX_PC_CLIP_CNTL_CLIP_MASK()
3970 static inline uint32_t A5XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A5XX_PC_GS_PARAM_MAX_VERTICES()  argument
3972 	return ((val) << A5XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A5XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A5XX_PC_GS_PARAM_MAX_VERTICES()
3976 static inline uint32_t A5XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A5XX_PC_GS_PARAM_INVOCATIONS()  argument
3978 	return ((val) << A5XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A5XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A5XX_PC_GS_PARAM_INVOCATIONS()
3982 static inline uint32_t A5XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_GS_PARAM_PRIMTYPE()  argument
3984 	return ((val) << A5XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A5XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A5XX_PC_GS_PARAM_PRIMTYPE()
3990 static inline uint32_t A5XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A5XX_PC_HS_PARAM_VERTICES_OUT()  argument
3992 	return ((val) << A5XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A5XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A5XX_PC_HS_PARAM_VERTICES_OUT()
3996 static inline uint32_t A5XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A5XX_PC_HS_PARAM_SPACING()  argument
3998 	return ((val) << A5XX_PC_HS_PARAM_SPACING__SHIFT) & A5XX_PC_HS_PARAM_SPACING__MASK;  in A5XX_PC_HS_PARAM_SPACING()
4008 static inline uint32_t A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val)  in A5XX_VFD_CONTROL_0_VTXCNT()  argument
4010 	return ((val) << A5XX_VFD_CONTROL_0_VTXCNT__SHIFT) & A5XX_VFD_CONTROL_0_VTXCNT__MASK;  in A5XX_VFD_CONTROL_0_VTXCNT()
4016 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4VTX()  argument
4018 	return ((val) << A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A5XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A5XX_VFD_CONTROL_1_REGID4VTX()
4022 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4INST()  argument
4024 	return ((val) << A5XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A5XX_VFD_CONTROL_1_REGID4INST__MASK;  in A5XX_VFD_CONTROL_1_REGID4INST()
4028 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4PRIMID(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4PRIMID()  argument
4030 	return ((val) << A5XX_VFD_CONTROL_1_REGID4PRIMID__SHIFT) & A5XX_VFD_CONTROL_1_REGID4PRIMID__MASK;  in A5XX_VFD_CONTROL_1_REGID4PRIMID()
4036 static inline uint32_t A5XX_VFD_CONTROL_2_REGID_PATCHID(uint32_t val)  in A5XX_VFD_CONTROL_2_REGID_PATCHID()  argument
4038 	return ((val) << A5XX_VFD_CONTROL_2_REGID_PATCHID__SHIFT) & A5XX_VFD_CONTROL_2_REGID_PATCHID__MASK;  in A5XX_VFD_CONTROL_2_REGID_PATCHID()
4044 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_PATCHID(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_PATCHID()  argument
4046 	return ((val) << A5XX_VFD_CONTROL_3_REGID_PATCHID__SHIFT) & A5XX_VFD_CONTROL_3_REGID_PATCHID__MASK;  in A5XX_VFD_CONTROL_3_REGID_PATCHID()
4050 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_TESSX()  argument
4052 	return ((val) << A5XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A5XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A5XX_VFD_CONTROL_3_REGID_TESSX()
4056 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_TESSY()  argument
4058 	return ((val) << A5XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A5XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A5XX_VFD_CONTROL_3_REGID_TESSY()
4084 static inline uint32_t A5XX_VFD_DECODE_INSTR_IDX(uint32_t val)  in A5XX_VFD_DECODE_INSTR_IDX()  argument
4086 	return ((val) << A5XX_VFD_DECODE_INSTR_IDX__SHIFT) & A5XX_VFD_DECODE_INSTR_IDX__MASK;  in A5XX_VFD_DECODE_INSTR_IDX()
4091 static inline uint32_t A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val)  in A5XX_VFD_DECODE_INSTR_FORMAT()  argument
4093 	return ((val) << A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A5XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A5XX_VFD_DECODE_INSTR_FORMAT()
4097 static inline uint32_t A5XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A5XX_VFD_DECODE_INSTR_SWAP()  argument
4099 	return ((val) << A5XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A5XX_VFD_DECODE_INSTR_SWAP__MASK;  in A5XX_VFD_DECODE_INSTR_SWAP()
4111 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val)  in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()  argument
4113 …return ((val) << A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__…  in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()
4117 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val)  in A5XX_VFD_DEST_CNTL_INSTR_REGID()  argument
4119 	return ((val) << A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK;  in A5XX_VFD_DEST_CNTL_INSTR_REGID()
4130 static inline uint32_t A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET()  argument
4132 …return ((val) << A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET()
4136 static inline uint32_t A5XX_SP_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_VS_CONFIG_SHADEROBJOFFSET()  argument
4138 …return ((val) << A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_VS_CONFIG_SHADEROBJOFFSET()
4145 static inline uint32_t A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET()  argument
4147 …return ((val) << A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET()
4151 static inline uint32_t A5XX_SP_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_FS_CONFIG_SHADEROBJOFFSET()  argument
4153 …return ((val) << A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_FS_CONFIG_SHADEROBJOFFSET()
4160 static inline uint32_t A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET()  argument
4162 …return ((val) << A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET()
4166 static inline uint32_t A5XX_SP_HS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_HS_CONFIG_SHADEROBJOFFSET()  argument
4168 …return ((val) << A5XX_SP_HS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_HS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_HS_CONFIG_SHADEROBJOFFSET()
4175 static inline uint32_t A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET()  argument
4177 …return ((val) << A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET()
4181 static inline uint32_t A5XX_SP_DS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_DS_CONFIG_SHADEROBJOFFSET()  argument
4183 …return ((val) << A5XX_SP_DS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_DS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_DS_CONFIG_SHADEROBJOFFSET()
4190 static inline uint32_t A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET()  argument
4192 …return ((val) << A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET()
4196 static inline uint32_t A5XX_SP_GS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_GS_CONFIG_SHADEROBJOFFSET()  argument
4198 …return ((val) << A5XX_SP_GS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_GS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_GS_CONFIG_SHADEROBJOFFSET()
4205 static inline uint32_t A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET()  argument
4207 …return ((val) << A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET()
4211 static inline uint32_t A5XX_SP_CS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_CS_CONFIG_SHADEROBJOFFSET()  argument
4213 …return ((val) << A5XX_SP_CS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_CS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_CS_CONFIG_SHADEROBJOFFSET()
4224 static inline uint32_t A5XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
4226 	return ((val) << A5XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_VS_CTRL_REG0_THREADSIZE()
4230 static inline uint32_t A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4232 …return ((val) << A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
4236 static inline uint32_t A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4238 …return ((val) << A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
4244 static inline uint32_t A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()  argument
4246 	return ((val) << A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()
4252 static inline uint32_t A5XX_SP_PRIMITIVE_CNTL_VSOUT(uint32_t val)  in A5XX_SP_PRIMITIVE_CNTL_VSOUT()  argument
4254 	return ((val) << A5XX_SP_PRIMITIVE_CNTL_VSOUT__SHIFT) & A5XX_SP_PRIMITIVE_CNTL_VSOUT__MASK;  in A5XX_SP_PRIMITIVE_CNTL_VSOUT()
4262 static inline uint32_t A5XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A5XX_SP_VS_OUT_REG_A_REGID()  argument
4264 	return ((val) << A5XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_A_REGID__MASK;  in A5XX_SP_VS_OUT_REG_A_REGID()
4268 static inline uint32_t A5XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A5XX_SP_VS_OUT_REG_A_COMPMASK()  argument
4270 	return ((val) << A5XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A5XX_SP_VS_OUT_REG_A_COMPMASK()
4274 static inline uint32_t A5XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A5XX_SP_VS_OUT_REG_B_REGID()  argument
4276 	return ((val) << A5XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_B_REGID__MASK;  in A5XX_SP_VS_OUT_REG_B_REGID()
4280 static inline uint32_t A5XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A5XX_SP_VS_OUT_REG_B_COMPMASK()  argument
4282 	return ((val) << A5XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A5XX_SP_VS_OUT_REG_B_COMPMASK()
4290 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
4292 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()
4296 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
4298 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()
4302 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
4304 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()
4308 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
4310 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()
4323 static inline uint32_t A5XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
4325 	return ((val) << A5XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_FS_CTRL_REG0_THREADSIZE()
4329 static inline uint32_t A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4331 …return ((val) << A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
4335 static inline uint32_t A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4337 …return ((val) << A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
4343 static inline uint32_t A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()  argument
4345 	return ((val) << A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()
4357 static inline uint32_t A5XX_SP_BLEND_CNTL_ENABLE_BLEND(uint32_t val)  in A5XX_SP_BLEND_CNTL_ENABLE_BLEND()  argument
4359 	return ((val) << A5XX_SP_BLEND_CNTL_ENABLE_BLEND__SHIFT) & A5XX_SP_BLEND_CNTL_ENABLE_BLEND__MASK;  in A5XX_SP_BLEND_CNTL_ENABLE_BLEND()
4367 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_MRT(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_MRT()  argument
4369 	return ((val) << A5XX_SP_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_MRT__MASK;  in A5XX_SP_FS_OUTPUT_CNTL_MRT()
4373 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()  argument
4375 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__…  in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()
4379 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()  argument
4381 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMA…  in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()
4389 static inline uint32_t A5XX_SP_FS_OUTPUT_REG_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_REG_REGID()  argument
4391 	return ((val) << A5XX_SP_FS_OUTPUT_REG_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_REG_REGID__MASK;  in A5XX_SP_FS_OUTPUT_REG_REGID()
4400 static inline uint32_t A5XX_SP_FS_MRT_REG_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()  argument
4402 	return ((val) << A5XX_SP_FS_MRT_REG_COLOR_FORMAT__SHIFT) & A5XX_SP_FS_MRT_REG_COLOR_FORMAT__MASK;  in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()
4414 static inline uint32_t A5XX_SP_CS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_CS_CTRL_REG0_THREADSIZE()  argument
4416 	return ((val) << A5XX_SP_CS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_CS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_CS_CTRL_REG0_THREADSIZE()
4420 static inline uint32_t A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4422 …return ((val) << A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_CS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()
4426 static inline uint32_t A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4428 …return ((val) << A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_CS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()
4434 static inline uint32_t A5XX_SP_CS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_BRANCHSTACK()  argument
4436 	return ((val) << A5XX_SP_CS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_CS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_CS_CTRL_REG0_BRANCHSTACK()
4449 static inline uint32_t A5XX_SP_HS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_HS_CTRL_REG0_THREADSIZE()  argument
4451 	return ((val) << A5XX_SP_HS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_HS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_HS_CTRL_REG0_THREADSIZE()
4455 static inline uint32_t A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4457 …return ((val) << A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT()
4461 static inline uint32_t A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4463 …return ((val) << A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT()
4469 static inline uint32_t A5XX_SP_HS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_BRANCHSTACK()  argument
4471 	return ((val) << A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_HS_CTRL_REG0_BRANCHSTACK()
4484 static inline uint32_t A5XX_SP_DS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_DS_CTRL_REG0_THREADSIZE()  argument
4486 	return ((val) << A5XX_SP_DS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_DS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_DS_CTRL_REG0_THREADSIZE()
4490 static inline uint32_t A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4492 …return ((val) << A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT()
4496 static inline uint32_t A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4498 …return ((val) << A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT()
4504 static inline uint32_t A5XX_SP_DS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_BRANCHSTACK()  argument
4506 	return ((val) << A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_DS_CTRL_REG0_BRANCHSTACK()
4519 static inline uint32_t A5XX_SP_GS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_GS_CTRL_REG0_THREADSIZE()  argument
4521 	return ((val) << A5XX_SP_GS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_GS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_GS_CTRL_REG0_THREADSIZE()
4525 static inline uint32_t A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4527 …return ((val) << A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT()
4531 static inline uint32_t A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4533 …return ((val) << A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT()
4539 static inline uint32_t A5XX_SP_GS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_BRANCHSTACK()  argument
4541 	return ((val) << A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_GS_CTRL_REG0_BRANCHSTACK()
4553 static inline uint32_t A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()  argument
4555 …return ((val) << A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__…  in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()
4561 static inline uint32_t A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()  argument
4563 …return ((val) << A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES…  in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()
4636 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
4638 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
4642 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE(enum a3xx_threadsize val)  in A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE()  argument
4644 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_CSTHREADSI…  in A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE()
4650 static inline uint32_t A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()  argument
4652 …return ((val) << A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__SHIFT) & A5XX_HLSQ_CONTROL_1_REG_PRIM…  in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()
4658 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
4660 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()
4664 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEID(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEID()  argument
4666 	return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__MASK;  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEID()
4670 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK()  argument
4672 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__…  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK()
4676 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_CENTERRHW(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_CENTERRHW()  argument
4678 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_CENTERRHW__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_CENTERRHW__MA…  in A5XX_HLSQ_CONTROL_2_REG_CENTERRHW()
4684 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()  argument
4686 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP…  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()
4690 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()  argument
4692 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_LINE…  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()
4696 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()  argument
4698 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_PE…  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()
4702 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()  argument
4704 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_L…  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()
4710 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()  argument
4712 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_IJ_PERS…  in A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()
4716 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()  argument
4718 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_IJ_LIN…  in A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()
4722 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()  argument
4724 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_XYCOORDREG…  in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()
4728 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()  argument
4730 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREG…  in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()
4739 static inline uint32_t A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET()  argument
4741 …return ((val) << A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET()
4745 static inline uint32_t A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET()  argument
4747 …return ((val) << A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET()
4754 static inline uint32_t A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET()  argument
4756 …return ((val) << A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET()
4760 static inline uint32_t A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET()  argument
4762 …return ((val) << A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET()
4769 static inline uint32_t A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET()  argument
4771 …return ((val) << A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET()
4775 static inline uint32_t A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET()  argument
4777 …return ((val) << A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET()
4784 static inline uint32_t A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET()  argument
4786 …return ((val) << A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET()
4790 static inline uint32_t A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET()  argument
4792 …return ((val) << A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET()
4799 static inline uint32_t A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET()  argument
4801 …return ((val) << A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET()
4805 static inline uint32_t A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET()  argument
4807 …return ((val) << A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET()
4814 static inline uint32_t A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET()  argument
4816 …return ((val) << A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET()
4820 static inline uint32_t A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET()  argument
4822 …return ((val) << A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET()
4829 static inline uint32_t A5XX_HLSQ_VS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_VS_CNTL_INSTRLEN()  argument
4831 	return ((val) << A5XX_HLSQ_VS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_VS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_VS_CNTL_INSTRLEN()
4838 static inline uint32_t A5XX_HLSQ_FS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_FS_CNTL_INSTRLEN()  argument
4840 	return ((val) << A5XX_HLSQ_FS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_FS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_FS_CNTL_INSTRLEN()
4847 static inline uint32_t A5XX_HLSQ_HS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_HS_CNTL_INSTRLEN()  argument
4849 	return ((val) << A5XX_HLSQ_HS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_HS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_HS_CNTL_INSTRLEN()
4856 static inline uint32_t A5XX_HLSQ_DS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_DS_CNTL_INSTRLEN()  argument
4858 	return ((val) << A5XX_HLSQ_DS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_DS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_DS_CNTL_INSTRLEN()
4865 static inline uint32_t A5XX_HLSQ_GS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_GS_CNTL_INSTRLEN()  argument
4867 	return ((val) << A5XX_HLSQ_GS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_GS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_GS_CNTL_INSTRLEN()
4874 static inline uint32_t A5XX_HLSQ_CS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_CS_CNTL_INSTRLEN()  argument
4876 	return ((val) << A5XX_HLSQ_CS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_CS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_CS_CNTL_INSTRLEN()
4888 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM()  argument
4890 	return ((val) << A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM__MASK;  in A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM()
4894 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX()  argument
4896 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX()
4900 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY()  argument
4902 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY()
4906 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ()  argument
4908 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ()
4914 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X()  argument
4916 …return ((val) << A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X…  in A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X()
4922 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X()  argument
4924 …return ((val) << A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__…  in A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X()
4930 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y()  argument
4932 …return ((val) << A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y…  in A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y()
4938 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y()  argument
4940 …return ((val) << A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__…  in A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y()
4946 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z()  argument
4948 …return ((val) << A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z…  in A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z()
4954 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z()  argument
4956 …return ((val) << A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__…  in A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z()
4962 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID()  argument
4964 	return ((val) << A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__SHIFT) & A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__MASK;  in A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID()
4968 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_UNK0(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_UNK0()  argument
4970 	return ((val) << A5XX_HLSQ_CS_CNTL_0_UNK0__SHIFT) & A5XX_HLSQ_CS_CNTL_0_UNK0__MASK;  in A5XX_HLSQ_CS_CNTL_0_UNK0()
4974 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_UNK1(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_UNK1()  argument
4976 	return ((val) << A5XX_HLSQ_CS_CNTL_0_UNK1__SHIFT) & A5XX_HLSQ_CS_CNTL_0_UNK1__MASK;  in A5XX_HLSQ_CS_CNTL_0_UNK1()
4980 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID()  argument
4982 	return ((val) << A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID__SHIFT) & A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID__MASK;  in A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID()
5036 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()  argument
5038 	return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__MASK;  in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()
5042 static inline uint32_t A5XX_RB_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_2D_SRC_INFO_TILE_MODE()  argument
5044 	return ((val) << A5XX_RB_2D_SRC_INFO_TILE_MODE__SHIFT) & A5XX_RB_2D_SRC_INFO_TILE_MODE__MASK;  in A5XX_RB_2D_SRC_INFO_TILE_MODE()
5048 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()  argument
5050 	return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_SWAP__MASK;  in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()
5062 static inline uint32_t A5XX_RB_2D_SRC_SIZE_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_SIZE_PITCH()  argument
5064 	return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_PITCH__MASK;  in A5XX_RB_2D_SRC_SIZE_PITCH()
5068 static inline uint32_t A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()  argument
5070 …return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__M…  in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()
5076 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()  argument
5078 	return ((val) << A5XX_RB_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_FORMAT__MASK;  in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()
5082 static inline uint32_t A5XX_RB_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_2D_DST_INFO_TILE_MODE()  argument
5084 	return ((val) << A5XX_RB_2D_DST_INFO_TILE_MODE__SHIFT) & A5XX_RB_2D_DST_INFO_TILE_MODE__MASK;  in A5XX_RB_2D_DST_INFO_TILE_MODE()
5088 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_2D_DST_INFO_COLOR_SWAP()  argument
5090 	return ((val) << A5XX_RB_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_SWAP__MASK;  in A5XX_RB_2D_DST_INFO_COLOR_SWAP()
5102 static inline uint32_t A5XX_RB_2D_DST_SIZE_PITCH(uint32_t val)  in A5XX_RB_2D_DST_SIZE_PITCH()  argument
5104 	return ((val >> 6) << A5XX_RB_2D_DST_SIZE_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_PITCH__MASK;  in A5XX_RB_2D_DST_SIZE_PITCH()
5108 static inline uint32_t A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(uint32_t val)  in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()  argument
5110 …return ((val >> 6) << A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__M…  in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()
5120 static inline uint32_t A5XX_RB_2D_SRC_FLAGS_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_FLAGS_PITCH()  argument
5122 	return ((val >> 6) << A5XX_RB_2D_SRC_FLAGS_PITCH__SHIFT) & A5XX_RB_2D_SRC_FLAGS_PITCH__MASK;  in A5XX_RB_2D_SRC_FLAGS_PITCH()
5132 static inline uint32_t A5XX_RB_2D_DST_FLAGS_PITCH(uint32_t val)  in A5XX_RB_2D_DST_FLAGS_PITCH()  argument
5134 	return ((val >> 6) << A5XX_RB_2D_DST_FLAGS_PITCH__SHIFT) & A5XX_RB_2D_DST_FLAGS_PITCH__MASK;  in A5XX_RB_2D_DST_FLAGS_PITCH()
5142 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()  argument
5144 …return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__…  in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()
5148 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_GRAS_2D_SRC_INFO_TILE_MODE()  argument
5150 	return ((val) << A5XX_GRAS_2D_SRC_INFO_TILE_MODE__SHIFT) & A5XX_GRAS_2D_SRC_INFO_TILE_MODE__MASK;  in A5XX_GRAS_2D_SRC_INFO_TILE_MODE()
5154 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()  argument
5156 	return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__MASK;  in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()
5164 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()  argument
5166 …return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__…  in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()
5170 static inline uint32_t A5XX_GRAS_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_GRAS_2D_DST_INFO_TILE_MODE()  argument
5172 	return ((val) << A5XX_GRAS_2D_DST_INFO_TILE_MODE__SHIFT) & A5XX_GRAS_2D_DST_INFO_TILE_MODE__MASK;  in A5XX_GRAS_2D_DST_INFO_TILE_MODE()
5176 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()  argument
5178 	return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__MASK;  in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()
5189 static inline uint32_t A5XX_TEX_SAMP_0_XY_MAG(enum a5xx_tex_filter val)  in A5XX_TEX_SAMP_0_XY_MAG()  argument
5191 	return ((val) << A5XX_TEX_SAMP_0_XY_MAG__SHIFT) & A5XX_TEX_SAMP_0_XY_MAG__MASK;  in A5XX_TEX_SAMP_0_XY_MAG()
5195 static inline uint32_t A5XX_TEX_SAMP_0_XY_MIN(enum a5xx_tex_filter val)  in A5XX_TEX_SAMP_0_XY_MIN()  argument
5197 	return ((val) << A5XX_TEX_SAMP_0_XY_MIN__SHIFT) & A5XX_TEX_SAMP_0_XY_MIN__MASK;  in A5XX_TEX_SAMP_0_XY_MIN()
5201 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_S(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_S()  argument
5203 	return ((val) << A5XX_TEX_SAMP_0_WRAP_S__SHIFT) & A5XX_TEX_SAMP_0_WRAP_S__MASK;  in A5XX_TEX_SAMP_0_WRAP_S()
5207 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_T(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_T()  argument
5209 	return ((val) << A5XX_TEX_SAMP_0_WRAP_T__SHIFT) & A5XX_TEX_SAMP_0_WRAP_T__MASK;  in A5XX_TEX_SAMP_0_WRAP_T()
5213 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_R(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_R()  argument
5215 	return ((val) << A5XX_TEX_SAMP_0_WRAP_R__SHIFT) & A5XX_TEX_SAMP_0_WRAP_R__MASK;  in A5XX_TEX_SAMP_0_WRAP_R()
5219 static inline uint32_t A5XX_TEX_SAMP_0_ANISO(enum a5xx_tex_aniso val)  in A5XX_TEX_SAMP_0_ANISO()  argument
5221 	return ((val) << A5XX_TEX_SAMP_0_ANISO__SHIFT) & A5XX_TEX_SAMP_0_ANISO__MASK;  in A5XX_TEX_SAMP_0_ANISO()
5225 static inline uint32_t A5XX_TEX_SAMP_0_LOD_BIAS(float val)  in A5XX_TEX_SAMP_0_LOD_BIAS()  argument
5227 …return ((((int32_t)(val * 256.0))) << A5XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A5XX_TEX_SAMP_0_LOD_BIAS_…  in A5XX_TEX_SAMP_0_LOD_BIAS()
5233 static inline uint32_t A5XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A5XX_TEX_SAMP_1_COMPARE_FUNC()  argument
5235 	return ((val) << A5XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A5XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A5XX_TEX_SAMP_1_COMPARE_FUNC()
5242 static inline uint32_t A5XX_TEX_SAMP_1_MAX_LOD(float val)  in A5XX_TEX_SAMP_1_MAX_LOD()  argument
5244 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A5XX_TEX_SAMP_1_MAX_LOD__…  in A5XX_TEX_SAMP_1_MAX_LOD()
5248 static inline uint32_t A5XX_TEX_SAMP_1_MIN_LOD(float val)  in A5XX_TEX_SAMP_1_MIN_LOD()  argument
5250 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A5XX_TEX_SAMP_1_MIN_LOD__…  in A5XX_TEX_SAMP_1_MIN_LOD()
5256 static inline uint32_t A5XX_TEX_SAMP_2_BCOLOR_OFFSET(uint32_t val)  in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()  argument
5258 	return ((val) << A5XX_TEX_SAMP_2_BCOLOR_OFFSET__SHIFT) & A5XX_TEX_SAMP_2_BCOLOR_OFFSET__MASK;  in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()
5266 static inline uint32_t A5XX_TEX_CONST_0_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_TEX_CONST_0_TILE_MODE()  argument
5268 	return ((val) << A5XX_TEX_CONST_0_TILE_MODE__SHIFT) & A5XX_TEX_CONST_0_TILE_MODE__MASK;  in A5XX_TEX_CONST_0_TILE_MODE()
5273 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_X(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_X()  argument
5275 	return ((val) << A5XX_TEX_CONST_0_SWIZ_X__SHIFT) & A5XX_TEX_CONST_0_SWIZ_X__MASK;  in A5XX_TEX_CONST_0_SWIZ_X()
5279 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Y(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_Y()  argument
5281 	return ((val) << A5XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Y__MASK;  in A5XX_TEX_CONST_0_SWIZ_Y()
5285 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Z(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_Z()  argument
5287 	return ((val) << A5XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Z__MASK;  in A5XX_TEX_CONST_0_SWIZ_Z()
5291 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_W(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_W()  argument
5293 	return ((val) << A5XX_TEX_CONST_0_SWIZ_W__SHIFT) & A5XX_TEX_CONST_0_SWIZ_W__MASK;  in A5XX_TEX_CONST_0_SWIZ_W()
5297 static inline uint32_t A5XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A5XX_TEX_CONST_0_MIPLVLS()  argument
5299 	return ((val) << A5XX_TEX_CONST_0_MIPLVLS__SHIFT) & A5XX_TEX_CONST_0_MIPLVLS__MASK;  in A5XX_TEX_CONST_0_MIPLVLS()
5303 static inline uint32_t A5XX_TEX_CONST_0_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TEX_CONST_0_SAMPLES()  argument
5305 	return ((val) << A5XX_TEX_CONST_0_SAMPLES__SHIFT) & A5XX_TEX_CONST_0_SAMPLES__MASK;  in A5XX_TEX_CONST_0_SAMPLES()
5309 static inline uint32_t A5XX_TEX_CONST_0_FMT(enum a5xx_tex_fmt val)  in A5XX_TEX_CONST_0_FMT()  argument
5311 	return ((val) << A5XX_TEX_CONST_0_FMT__SHIFT) & A5XX_TEX_CONST_0_FMT__MASK;  in A5XX_TEX_CONST_0_FMT()
5315 static inline uint32_t A5XX_TEX_CONST_0_SWAP(enum a3xx_color_swap val)  in A5XX_TEX_CONST_0_SWAP()  argument
5317 	return ((val) << A5XX_TEX_CONST_0_SWAP__SHIFT) & A5XX_TEX_CONST_0_SWAP__MASK;  in A5XX_TEX_CONST_0_SWAP()
5323 static inline uint32_t A5XX_TEX_CONST_1_WIDTH(uint32_t val)  in A5XX_TEX_CONST_1_WIDTH()  argument
5325 	return ((val) << A5XX_TEX_CONST_1_WIDTH__SHIFT) & A5XX_TEX_CONST_1_WIDTH__MASK;  in A5XX_TEX_CONST_1_WIDTH()
5329 static inline uint32_t A5XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A5XX_TEX_CONST_1_HEIGHT()  argument
5331 	return ((val) << A5XX_TEX_CONST_1_HEIGHT__SHIFT) & A5XX_TEX_CONST_1_HEIGHT__MASK;  in A5XX_TEX_CONST_1_HEIGHT()
5338 static inline uint32_t A5XX_TEX_CONST_2_PITCHALIGN(uint32_t val)  in A5XX_TEX_CONST_2_PITCHALIGN()  argument
5340 	return ((val) << A5XX_TEX_CONST_2_PITCHALIGN__SHIFT) & A5XX_TEX_CONST_2_PITCHALIGN__MASK;  in A5XX_TEX_CONST_2_PITCHALIGN()
5344 static inline uint32_t A5XX_TEX_CONST_2_PITCH(uint32_t val)  in A5XX_TEX_CONST_2_PITCH()  argument
5346 	return ((val) << A5XX_TEX_CONST_2_PITCH__SHIFT) & A5XX_TEX_CONST_2_PITCH__MASK;  in A5XX_TEX_CONST_2_PITCH()
5350 static inline uint32_t A5XX_TEX_CONST_2_TYPE(enum a5xx_tex_type val)  in A5XX_TEX_CONST_2_TYPE()  argument
5352 	return ((val) << A5XX_TEX_CONST_2_TYPE__SHIFT) & A5XX_TEX_CONST_2_TYPE__MASK;  in A5XX_TEX_CONST_2_TYPE()
5358 static inline uint32_t A5XX_TEX_CONST_3_ARRAY_PITCH(uint32_t val)  in A5XX_TEX_CONST_3_ARRAY_PITCH()  argument
5360 	return ((val >> 12) << A5XX_TEX_CONST_3_ARRAY_PITCH__SHIFT) & A5XX_TEX_CONST_3_ARRAY_PITCH__MASK;  in A5XX_TEX_CONST_3_ARRAY_PITCH()
5364 static inline uint32_t A5XX_TEX_CONST_3_MIN_LAYERSZ(uint32_t val)  in A5XX_TEX_CONST_3_MIN_LAYERSZ()  argument
5366 	return ((val >> 12) << A5XX_TEX_CONST_3_MIN_LAYERSZ__SHIFT) & A5XX_TEX_CONST_3_MIN_LAYERSZ__MASK;  in A5XX_TEX_CONST_3_MIN_LAYERSZ()
5374 static inline uint32_t A5XX_TEX_CONST_4_BASE_LO(uint32_t val)  in A5XX_TEX_CONST_4_BASE_LO()  argument
5376 	return ((val >> 5) << A5XX_TEX_CONST_4_BASE_LO__SHIFT) & A5XX_TEX_CONST_4_BASE_LO__MASK;  in A5XX_TEX_CONST_4_BASE_LO()
5382 static inline uint32_t A5XX_TEX_CONST_5_BASE_HI(uint32_t val)  in A5XX_TEX_CONST_5_BASE_HI()  argument
5384 	return ((val) << A5XX_TEX_CONST_5_BASE_HI__SHIFT) & A5XX_TEX_CONST_5_BASE_HI__MASK;  in A5XX_TEX_CONST_5_BASE_HI()
5388 static inline uint32_t A5XX_TEX_CONST_5_DEPTH(uint32_t val)  in A5XX_TEX_CONST_5_DEPTH()  argument
5390 	return ((val) << A5XX_TEX_CONST_5_DEPTH__SHIFT) & A5XX_TEX_CONST_5_DEPTH__MASK;  in A5XX_TEX_CONST_5_DEPTH()
5408 static inline uint32_t A5XX_SSBO_0_0_BASE_LO(uint32_t val)  in A5XX_SSBO_0_0_BASE_LO()  argument
5410 	return ((val >> 5) << A5XX_SSBO_0_0_BASE_LO__SHIFT) & A5XX_SSBO_0_0_BASE_LO__MASK;  in A5XX_SSBO_0_0_BASE_LO()
5416 static inline uint32_t A5XX_SSBO_0_1_PITCH(uint32_t val)  in A5XX_SSBO_0_1_PITCH()  argument
5418 	return ((val) << A5XX_SSBO_0_1_PITCH__SHIFT) & A5XX_SSBO_0_1_PITCH__MASK;  in A5XX_SSBO_0_1_PITCH()
5424 static inline uint32_t A5XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)  in A5XX_SSBO_0_2_ARRAY_PITCH()  argument
5426 	return ((val >> 12) << A5XX_SSBO_0_2_ARRAY_PITCH__SHIFT) & A5XX_SSBO_0_2_ARRAY_PITCH__MASK;  in A5XX_SSBO_0_2_ARRAY_PITCH()
5432 static inline uint32_t A5XX_SSBO_0_3_CPP(uint32_t val)  in A5XX_SSBO_0_3_CPP()  argument
5434 	return ((val) << A5XX_SSBO_0_3_CPP__SHIFT) & A5XX_SSBO_0_3_CPP__MASK;  in A5XX_SSBO_0_3_CPP()
5440 static inline uint32_t A5XX_SSBO_1_0_FMT(enum a5xx_tex_fmt val)  in A5XX_SSBO_1_0_FMT()  argument
5442 	return ((val) << A5XX_SSBO_1_0_FMT__SHIFT) & A5XX_SSBO_1_0_FMT__MASK;  in A5XX_SSBO_1_0_FMT()
5446 static inline uint32_t A5XX_SSBO_1_0_WIDTH(uint32_t val)  in A5XX_SSBO_1_0_WIDTH()  argument
5448 	return ((val) << A5XX_SSBO_1_0_WIDTH__SHIFT) & A5XX_SSBO_1_0_WIDTH__MASK;  in A5XX_SSBO_1_0_WIDTH()
5454 static inline uint32_t A5XX_SSBO_1_1_HEIGHT(uint32_t val)  in A5XX_SSBO_1_1_HEIGHT()  argument
5456 	return ((val) << A5XX_SSBO_1_1_HEIGHT__SHIFT) & A5XX_SSBO_1_1_HEIGHT__MASK;  in A5XX_SSBO_1_1_HEIGHT()
5460 static inline uint32_t A5XX_SSBO_1_1_DEPTH(uint32_t val)  in A5XX_SSBO_1_1_DEPTH()  argument
5462 	return ((val) << A5XX_SSBO_1_1_DEPTH__SHIFT) & A5XX_SSBO_1_1_DEPTH__MASK;  in A5XX_SSBO_1_1_DEPTH()
5468 static inline uint32_t A5XX_SSBO_2_0_BASE_LO(uint32_t val)  in A5XX_SSBO_2_0_BASE_LO()  argument
5470 	return ((val) << A5XX_SSBO_2_0_BASE_LO__SHIFT) & A5XX_SSBO_2_0_BASE_LO__MASK;  in A5XX_SSBO_2_0_BASE_LO()
5476 static inline uint32_t A5XX_SSBO_2_1_BASE_HI(uint32_t val)  in A5XX_SSBO_2_1_BASE_HI()  argument
5478 	return ((val) << A5XX_SSBO_2_1_BASE_HI__SHIFT) & A5XX_SSBO_2_1_BASE_HI__MASK;  in A5XX_SSBO_2_1_BASE_HI()
5484 static inline uint32_t A5XX_UBO_0_BASE_LO(uint32_t val)  in A5XX_UBO_0_BASE_LO()  argument
5486 	return ((val) << A5XX_UBO_0_BASE_LO__SHIFT) & A5XX_UBO_0_BASE_LO__MASK;  in A5XX_UBO_0_BASE_LO()
5492 static inline uint32_t A5XX_UBO_1_BASE_HI(uint32_t val)  in A5XX_UBO_1_BASE_HI()  argument
5494 	return ((val) << A5XX_UBO_1_BASE_HI__SHIFT) & A5XX_UBO_1_BASE_HI__MASK;  in A5XX_UBO_1_BASE_HI()