Lines Matching refs:val
947 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES() argument
949 …return ((val) << A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__SHIFT) & A3XX_GRAS_CL_CLIP_CNTL_NUM_… in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES()
955 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ() argument
957 return ((val) << A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK; in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
961 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT() argument
963 return ((val) << A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK; in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT()
969 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET() argument
971 return ((fui(val)) << A3XX_GRAS_CL_VPORT_XOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_XOFFSET__MASK; in A3XX_GRAS_CL_VPORT_XOFFSET()
977 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE() argument
979 return ((fui(val)) << A3XX_GRAS_CL_VPORT_XSCALE__SHIFT) & A3XX_GRAS_CL_VPORT_XSCALE__MASK; in A3XX_GRAS_CL_VPORT_XSCALE()
985 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET() argument
987 return ((fui(val)) << A3XX_GRAS_CL_VPORT_YOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_YOFFSET__MASK; in A3XX_GRAS_CL_VPORT_YOFFSET()
993 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE() argument
995 return ((fui(val)) << A3XX_GRAS_CL_VPORT_YSCALE__SHIFT) & A3XX_GRAS_CL_VPORT_YSCALE__MASK; in A3XX_GRAS_CL_VPORT_YSCALE()
1001 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET() argument
1003 return ((fui(val)) << A3XX_GRAS_CL_VPORT_ZOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_ZOFFSET__MASK; in A3XX_GRAS_CL_VPORT_ZOFFSET()
1009 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE() argument
1011 return ((fui(val)) << A3XX_GRAS_CL_VPORT_ZSCALE__SHIFT) & A3XX_GRAS_CL_VPORT_ZSCALE__MASK; in A3XX_GRAS_CL_VPORT_ZSCALE()
1017 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A3XX_GRAS_SU_POINT_MINMAX_MIN() argument
1019 …return ((((uint32_t)(val * 16.0))) << A3XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A3XX_GRAS_SU_POINT_M… in A3XX_GRAS_SU_POINT_MINMAX_MIN()
1023 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MAX(float val) in A3XX_GRAS_SU_POINT_MINMAX_MAX() argument
1025 …return ((((uint32_t)(val * 16.0))) << A3XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A3XX_GRAS_SU_POINT_M… in A3XX_GRAS_SU_POINT_MINMAX_MAX()
1031 static inline uint32_t A3XX_GRAS_SU_POINT_SIZE(float val) in A3XX_GRAS_SU_POINT_SIZE() argument
1033 …return ((((int32_t)(val * 16.0))) << A3XX_GRAS_SU_POINT_SIZE__SHIFT) & A3XX_GRAS_SU_POINT_SIZE__MA… in A3XX_GRAS_SU_POINT_SIZE()
1039 static inline uint32_t A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL(float val) in A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL() argument
1041 …return ((((int32_t)(val * 1048576.0))) << A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL__SHIFT) & A3XX_GRAS_S… in A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL()
1047 static inline uint32_t A3XX_GRAS_SU_POLY_OFFSET_OFFSET(float val) in A3XX_GRAS_SU_POLY_OFFSET_OFFSET() argument
1049 …return ((((int32_t)(val * 64.0))) << A3XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A3XX_GRAS_SU_POLY_O… in A3XX_GRAS_SU_POLY_OFFSET_OFFSET()
1058 static inline uint32_t A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val) in A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH() argument
1060 …return ((((int32_t)(val * 4.0))) << A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A3XX_GRAS_SU… in A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
1067 static inline uint32_t A3XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val) in A3XX_GRAS_SC_CONTROL_RENDER_MODE() argument
1069 return ((val) << A3XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) & A3XX_GRAS_SC_CONTROL_RENDER_MODE__MASK; in A3XX_GRAS_SC_CONTROL_RENDER_MODE()
1073 static inline uint32_t A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES(enum a3xx_msaa_samples val) in A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES() argument
1075 …return ((val) << A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) & A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MA… in A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
1079 static inline uint32_t A3XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val) in A3XX_GRAS_SC_CONTROL_RASTER_MODE() argument
1081 return ((val) << A3XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) & A3XX_GRAS_SC_CONTROL_RASTER_MODE__MASK; in A3XX_GRAS_SC_CONTROL_RASTER_MODE()
1088 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X() argument
1090 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
1094 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y() argument
1096 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
1103 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X() argument
1105 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
1109 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y() argument
1111 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
1118 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X() argument
1120 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
1124 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y() argument
1126 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
1133 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X() argument
1135 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
1139 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y() argument
1141 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
1148 static inline uint32_t A3XX_RB_MODE_CONTROL_RENDER_MODE(enum a3xx_render_mode val) in A3XX_RB_MODE_CONTROL_RENDER_MODE() argument
1150 return ((val) << A3XX_RB_MODE_CONTROL_RENDER_MODE__SHIFT) & A3XX_RB_MODE_CONTROL_RENDER_MODE__MASK; in A3XX_RB_MODE_CONTROL_RENDER_MODE()
1154 static inline uint32_t A3XX_RB_MODE_CONTROL_MRT(uint32_t val) in A3XX_RB_MODE_CONTROL_MRT() argument
1156 return ((val) << A3XX_RB_MODE_CONTROL_MRT__SHIFT) & A3XX_RB_MODE_CONTROL_MRT__MASK; in A3XX_RB_MODE_CONTROL_MRT()
1168 static inline uint32_t A3XX_RB_RENDER_CONTROL_BIN_WIDTH(uint32_t val) in A3XX_RB_RENDER_CONTROL_BIN_WIDTH() argument
1170 …return ((val >> 5) << A3XX_RB_RENDER_CONTROL_BIN_WIDTH__SHIFT) & A3XX_RB_RENDER_CONTROL_BIN_WIDTH_… in A3XX_RB_RENDER_CONTROL_BIN_WIDTH()
1176 static inline uint32_t A3XX_RB_RENDER_CONTROL_COORD_MASK(uint32_t val) in A3XX_RB_RENDER_CONTROL_COORD_MASK() argument
1178 …return ((val) << A3XX_RB_RENDER_CONTROL_COORD_MASK__SHIFT) & A3XX_RB_RENDER_CONTROL_COORD_MASK__MA… in A3XX_RB_RENDER_CONTROL_COORD_MASK()
1185 static inline uint32_t A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val) in A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC() argument
1187 …return ((val) << A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A3XX_RB_RENDER_CONTROL_ALPHA_TES… in A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC()
1196 static inline uint32_t A3XX_RB_MSAA_CONTROL_SAMPLES(enum a3xx_msaa_samples val) in A3XX_RB_MSAA_CONTROL_SAMPLES() argument
1198 return ((val) << A3XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) & A3XX_RB_MSAA_CONTROL_SAMPLES__MASK; in A3XX_RB_MSAA_CONTROL_SAMPLES()
1202 static inline uint32_t A3XX_RB_MSAA_CONTROL_SAMPLE_MASK(uint32_t val) in A3XX_RB_MSAA_CONTROL_SAMPLE_MASK() argument
1204 return ((val) << A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__SHIFT) & A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__MASK; in A3XX_RB_MSAA_CONTROL_SAMPLE_MASK()
1210 static inline uint32_t A3XX_RB_ALPHA_REF_UINT(uint32_t val) in A3XX_RB_ALPHA_REF_UINT() argument
1212 return ((val) << A3XX_RB_ALPHA_REF_UINT__SHIFT) & A3XX_RB_ALPHA_REF_UINT__MASK; in A3XX_RB_ALPHA_REF_UINT()
1216 static inline uint32_t A3XX_RB_ALPHA_REF_FLOAT(float val) in A3XX_RB_ALPHA_REF_FLOAT() argument
1218 …return ((_mesa_float_to_half(val)) << A3XX_RB_ALPHA_REF_FLOAT__SHIFT) & A3XX_RB_ALPHA_REF_FLOAT__M… in A3XX_RB_ALPHA_REF_FLOAT()
1229 static inline uint32_t A3XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val) in A3XX_RB_MRT_CONTROL_ROP_CODE() argument
1231 return ((val) << A3XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A3XX_RB_MRT_CONTROL_ROP_CODE__MASK; in A3XX_RB_MRT_CONTROL_ROP_CODE()
1235 static inline uint32_t A3XX_RB_MRT_CONTROL_DITHER_MODE(enum adreno_rb_dither_mode val) in A3XX_RB_MRT_CONTROL_DITHER_MODE() argument
1237 return ((val) << A3XX_RB_MRT_CONTROL_DITHER_MODE__SHIFT) & A3XX_RB_MRT_CONTROL_DITHER_MODE__MASK; in A3XX_RB_MRT_CONTROL_DITHER_MODE()
1241 static inline uint32_t A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE() argument
1243 …return ((val) << A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A3XX_RB_MRT_CONTROL_COMPONENT_ENAB… in A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
1249 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a3xx_color_fmt val) in A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT() argument
1251 …return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA… in A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
1255 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a3xx_tile_mode val) in A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE() argument
1257 …return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MO… in A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
1261 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A3XX_RB_MRT_BUF_INFO_COLOR_SWAP() argument
1263 return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK; in A3XX_RB_MRT_BUF_INFO_COLOR_SWAP()
1268 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val) in A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH() argument
1270 …return ((val >> 5) << A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_BU… in A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
1276 static inline uint32_t A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(uint32_t val) in A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE() argument
1278 …return ((val >> 5) << A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__SHIFT) & A3XX_RB_MRT_BUF_BASE_COLOR_BUF… in A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE()
1284 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR() argument
1286 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_RGB_… in A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
1290 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) in A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE() argument
1292 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_RG… in A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
1296 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR() argument
1298 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_RGB… in A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
1302 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR() argument
1304 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_AL… in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
1308 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE() argument
1310 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_… in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
1314 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR() argument
1316 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_A… in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
1323 static inline uint32_t A3XX_RB_BLEND_RED_UINT(uint32_t val) in A3XX_RB_BLEND_RED_UINT() argument
1325 return ((val) << A3XX_RB_BLEND_RED_UINT__SHIFT) & A3XX_RB_BLEND_RED_UINT__MASK; in A3XX_RB_BLEND_RED_UINT()
1329 static inline uint32_t A3XX_RB_BLEND_RED_FLOAT(float val) in A3XX_RB_BLEND_RED_FLOAT() argument
1331 …return ((_mesa_float_to_half(val)) << A3XX_RB_BLEND_RED_FLOAT__SHIFT) & A3XX_RB_BLEND_RED_FLOAT__M… in A3XX_RB_BLEND_RED_FLOAT()
1337 static inline uint32_t A3XX_RB_BLEND_GREEN_UINT(uint32_t val) in A3XX_RB_BLEND_GREEN_UINT() argument
1339 return ((val) << A3XX_RB_BLEND_GREEN_UINT__SHIFT) & A3XX_RB_BLEND_GREEN_UINT__MASK; in A3XX_RB_BLEND_GREEN_UINT()
1343 static inline uint32_t A3XX_RB_BLEND_GREEN_FLOAT(float val) in A3XX_RB_BLEND_GREEN_FLOAT() argument
1345 …return ((_mesa_float_to_half(val)) << A3XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A3XX_RB_BLEND_GREEN_FLOA… in A3XX_RB_BLEND_GREEN_FLOAT()
1351 static inline uint32_t A3XX_RB_BLEND_BLUE_UINT(uint32_t val) in A3XX_RB_BLEND_BLUE_UINT() argument
1353 return ((val) << A3XX_RB_BLEND_BLUE_UINT__SHIFT) & A3XX_RB_BLEND_BLUE_UINT__MASK; in A3XX_RB_BLEND_BLUE_UINT()
1357 static inline uint32_t A3XX_RB_BLEND_BLUE_FLOAT(float val) in A3XX_RB_BLEND_BLUE_FLOAT() argument
1359 …return ((_mesa_float_to_half(val)) << A3XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A3XX_RB_BLEND_BLUE_FLOAT_… in A3XX_RB_BLEND_BLUE_FLOAT()
1365 static inline uint32_t A3XX_RB_BLEND_ALPHA_UINT(uint32_t val) in A3XX_RB_BLEND_ALPHA_UINT() argument
1367 return ((val) << A3XX_RB_BLEND_ALPHA_UINT__SHIFT) & A3XX_RB_BLEND_ALPHA_UINT__MASK; in A3XX_RB_BLEND_ALPHA_UINT()
1371 static inline uint32_t A3XX_RB_BLEND_ALPHA_FLOAT(float val) in A3XX_RB_BLEND_ALPHA_FLOAT() argument
1373 …return ((_mesa_float_to_half(val)) << A3XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A3XX_RB_BLEND_ALPHA_FLOA… in A3XX_RB_BLEND_ALPHA_FLOAT()
1387 static inline uint32_t A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val) in A3XX_RB_COPY_CONTROL_MSAA_RESOLVE() argument
1389 …return ((val) << A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) & A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__MA… in A3XX_RB_COPY_CONTROL_MSAA_RESOLVE()
1394 static inline uint32_t A3XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val) in A3XX_RB_COPY_CONTROL_MODE() argument
1396 return ((val) << A3XX_RB_COPY_CONTROL_MODE__SHIFT) & A3XX_RB_COPY_CONTROL_MODE__MASK; in A3XX_RB_COPY_CONTROL_MODE()
1401 static inline uint32_t A3XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val) in A3XX_RB_COPY_CONTROL_FASTCLEAR() argument
1403 return ((val) << A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK; in A3XX_RB_COPY_CONTROL_FASTCLEAR()
1408 static inline uint32_t A3XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val) in A3XX_RB_COPY_CONTROL_GMEM_BASE() argument
1410 …return ((val >> 14) << A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A3XX_RB_COPY_CONTROL_GMEM_BASE__MA… in A3XX_RB_COPY_CONTROL_GMEM_BASE()
1416 static inline uint32_t A3XX_RB_COPY_DEST_BASE_BASE(uint32_t val) in A3XX_RB_COPY_DEST_BASE_BASE() argument
1418 return ((val >> 5) << A3XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A3XX_RB_COPY_DEST_BASE_BASE__MASK; in A3XX_RB_COPY_DEST_BASE_BASE()
1424 static inline uint32_t A3XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val) in A3XX_RB_COPY_DEST_PITCH_PITCH() argument
1426 return ((val >> 5) << A3XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A3XX_RB_COPY_DEST_PITCH_PITCH__MASK; in A3XX_RB_COPY_DEST_PITCH_PITCH()
1432 static inline uint32_t A3XX_RB_COPY_DEST_INFO_TILE(enum a3xx_tile_mode val) in A3XX_RB_COPY_DEST_INFO_TILE() argument
1434 return ((val) << A3XX_RB_COPY_DEST_INFO_TILE__SHIFT) & A3XX_RB_COPY_DEST_INFO_TILE__MASK; in A3XX_RB_COPY_DEST_INFO_TILE()
1438 static inline uint32_t A3XX_RB_COPY_DEST_INFO_FORMAT(enum a3xx_color_fmt val) in A3XX_RB_COPY_DEST_INFO_FORMAT() argument
1440 return ((val) << A3XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A3XX_RB_COPY_DEST_INFO_FORMAT__MASK; in A3XX_RB_COPY_DEST_INFO_FORMAT()
1444 static inline uint32_t A3XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val) in A3XX_RB_COPY_DEST_INFO_SWAP() argument
1446 return ((val) << A3XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A3XX_RB_COPY_DEST_INFO_SWAP__MASK; in A3XX_RB_COPY_DEST_INFO_SWAP()
1450 static inline uint32_t A3XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val) in A3XX_RB_COPY_DEST_INFO_DITHER_MODE() argument
1452 …return ((val) << A3XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A3XX_RB_COPY_DEST_INFO_DITHER_MODE__… in A3XX_RB_COPY_DEST_INFO_DITHER_MODE()
1456 static inline uint32_t A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val) in A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE() argument
1458 …return ((val) << A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) & A3XX_RB_COPY_DEST_INFO_COMPONEN… in A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
1462 static inline uint32_t A3XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val) in A3XX_RB_COPY_DEST_INFO_ENDIAN() argument
1464 return ((val) << A3XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) & A3XX_RB_COPY_DEST_INFO_ENDIAN__MASK; in A3XX_RB_COPY_DEST_INFO_ENDIAN()
1474 static inline uint32_t A3XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val) in A3XX_RB_DEPTH_CONTROL_ZFUNC() argument
1476 return ((val) << A3XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A3XX_RB_DEPTH_CONTROL_ZFUNC__MASK; in A3XX_RB_DEPTH_CONTROL_ZFUNC()
1486 static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val) in A3XX_RB_DEPTH_INFO_DEPTH_FORMAT() argument
1488 return ((val) << A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK; in A3XX_RB_DEPTH_INFO_DEPTH_FORMAT()
1492 static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val) in A3XX_RB_DEPTH_INFO_DEPTH_BASE() argument
1494 return ((val >> 12) << A3XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A3XX_RB_DEPTH_INFO_DEPTH_BASE__MASK; in A3XX_RB_DEPTH_INFO_DEPTH_BASE()
1500 static inline uint32_t A3XX_RB_DEPTH_PITCH(uint32_t val) in A3XX_RB_DEPTH_PITCH() argument
1502 return ((val >> 3) << A3XX_RB_DEPTH_PITCH__SHIFT) & A3XX_RB_DEPTH_PITCH__MASK; in A3XX_RB_DEPTH_PITCH()
1511 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val) in A3XX_RB_STENCIL_CONTROL_FUNC() argument
1513 return ((val) << A3XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A3XX_RB_STENCIL_CONTROL_FUNC__MASK; in A3XX_RB_STENCIL_CONTROL_FUNC()
1517 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_FAIL() argument
1519 return ((val) << A3XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A3XX_RB_STENCIL_CONTROL_FAIL__MASK; in A3XX_RB_STENCIL_CONTROL_FAIL()
1523 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZPASS() argument
1525 return ((val) << A3XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZPASS__MASK; in A3XX_RB_STENCIL_CONTROL_ZPASS()
1529 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZFAIL() argument
1531 return ((val) << A3XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZFAIL__MASK; in A3XX_RB_STENCIL_CONTROL_ZFAIL()
1535 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val) in A3XX_RB_STENCIL_CONTROL_FUNC_BF() argument
1537 return ((val) << A3XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_FUNC_BF__MASK; in A3XX_RB_STENCIL_CONTROL_FUNC_BF()
1541 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_FAIL_BF() argument
1543 return ((val) << A3XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_FAIL_BF__MASK; in A3XX_RB_STENCIL_CONTROL_FAIL_BF()
1547 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZPASS_BF() argument
1549 return ((val) << A3XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK; in A3XX_RB_STENCIL_CONTROL_ZPASS_BF()
1553 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZFAIL_BF() argument
1555 return ((val) << A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK; in A3XX_RB_STENCIL_CONTROL_ZFAIL_BF()
1563 static inline uint32_t A3XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val) in A3XX_RB_STENCIL_INFO_STENCIL_BASE() argument
1565 …return ((val >> 12) << A3XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A3XX_RB_STENCIL_INFO_STENCIL_BA… in A3XX_RB_STENCIL_INFO_STENCIL_BASE()
1571 static inline uint32_t A3XX_RB_STENCIL_PITCH(uint32_t val) in A3XX_RB_STENCIL_PITCH() argument
1573 return ((val >> 3) << A3XX_RB_STENCIL_PITCH__SHIFT) & A3XX_RB_STENCIL_PITCH__MASK; in A3XX_RB_STENCIL_PITCH()
1579 static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILREF(uint32_t val) in A3XX_RB_STENCILREFMASK_STENCILREF() argument
1581 …return ((val) << A3XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A3XX_RB_STENCILREFMASK_STENCILREF__MA… in A3XX_RB_STENCILREFMASK_STENCILREF()
1585 static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_STENCILMASK() argument
1587 …return ((val) << A3XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A3XX_RB_STENCILREFMASK_STENCILMASK__… in A3XX_RB_STENCILREFMASK_STENCILMASK()
1591 static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_STENCILWRITEMASK() argument
1593 …return ((val) << A3XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A3XX_RB_STENCILREFMASK_STENCILW… in A3XX_RB_STENCILREFMASK_STENCILWRITEMASK()
1599 static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val) in A3XX_RB_STENCILREFMASK_BF_STENCILREF() argument
1601 …return ((val) << A3XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A3XX_RB_STENCILREFMASK_BF_STENCILR… in A3XX_RB_STENCILREFMASK_BF_STENCILREF()
1605 static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_BF_STENCILMASK() argument
1607 …return ((val) << A3XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A3XX_RB_STENCILREFMASK_BF_STENCIL… in A3XX_RB_STENCILREFMASK_BF_STENCILMASK()
1611 static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK() argument
1613 …return ((val) << A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A3XX_RB_STENCILREFMASK_BF_ST… in A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
1622 static inline uint32_t A3XX_RB_WINDOW_OFFSET_X(uint32_t val) in A3XX_RB_WINDOW_OFFSET_X() argument
1624 return ((val) << A3XX_RB_WINDOW_OFFSET_X__SHIFT) & A3XX_RB_WINDOW_OFFSET_X__MASK; in A3XX_RB_WINDOW_OFFSET_X()
1628 static inline uint32_t A3XX_RB_WINDOW_OFFSET_Y(uint32_t val) in A3XX_RB_WINDOW_OFFSET_Y() argument
1630 return ((val) << A3XX_RB_WINDOW_OFFSET_Y__SHIFT) & A3XX_RB_WINDOW_OFFSET_Y__MASK; in A3XX_RB_WINDOW_OFFSET_Y()
1650 static inline uint32_t A3XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val) in A3XX_PC_VSTREAM_CONTROL_SIZE() argument
1652 return ((val) << A3XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) & A3XX_PC_VSTREAM_CONTROL_SIZE__MASK; in A3XX_PC_VSTREAM_CONTROL_SIZE()
1656 static inline uint32_t A3XX_PC_VSTREAM_CONTROL_N(uint32_t val) in A3XX_PC_VSTREAM_CONTROL_N() argument
1658 return ((val) << A3XX_PC_VSTREAM_CONTROL_N__SHIFT) & A3XX_PC_VSTREAM_CONTROL_N__MASK; in A3XX_PC_VSTREAM_CONTROL_N()
1666 static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(uint32_t val) in A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC() argument
1668 …return ((val) << A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC__SHIFT) & A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC… in A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC()
1672 static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val) in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE() argument
1674 …return ((val) << A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) & A3XX_PC_PRIM_VTX_CNTL_POLYMO… in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE()
1678 static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val) in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE() argument
1680 …return ((val) << A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE__SHIFT) & A3XX_PC_PRIM_VTX_CNTL_POLYMOD… in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE()
1692 static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val) in A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE() argument
1694 …return ((val) << A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A3XX_HLSQ_CONTROL_0_REG_FSTHREADSI… in A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
1702 static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC(uint32_t val) in A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC() argument
1704 …return ((val) << A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC__SHIFT) & A3XX_HLSQ_CONTROL_0_REG_CY… in A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC()
1710 static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val) in A3XX_HLSQ_CONTROL_0_REG_CONSTMODE() argument
1712 …return ((val) << A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) & A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__MA… in A3XX_HLSQ_CONTROL_0_REG_CONSTMODE()
1722 static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val) in A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE() argument
1724 …return ((val) << A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) & A3XX_HLSQ_CONTROL_1_REG_VSTHREADSI… in A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
1729 static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(uint32_t val) in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID() argument
1731 …return ((val) << A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID__SHIFT) & A3XX_HLSQ_CONTROL_1_REG_FRAGCO… in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID()
1735 static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID(uint32_t val) in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID() argument
1737 …return ((val) << A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID__SHIFT) & A3XX_HLSQ_CONTROL_1_REG_FRAGCO… in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID()
1743 static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID(uint32_t val) in A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID() argument
1745 …return ((val) << A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID__SHIFT) & A3XX_HLSQ_CONTROL_2_REG_FACENESSR… in A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID()
1749 static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID(uint32_t val) in A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID() argument
1751 …return ((val) << A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID__SHIFT) & A3XX_HLSQ_CONTROL_2_REG_COVVALUER… in A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID()
1755 static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val) in A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD() argument
1757 …return ((val) << A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) & A3XX_HLSQ_CONTROL_2_REG_PRIM… in A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
1763 static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID(uint32_t val) in A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID() argument
1765 …return ((val) << A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID__SHIFT) & A3XX_HLSQ_CONTROL_3_REG_IJPE… in A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID()
1769 static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID(uint32_t val) in A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID() argument
1771 …return ((val) << A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID__SHIFT) & A3XX_HLSQ_CONTROL_3_REG_I… in A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID()
1775 static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID(uint32_t val) in A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID() argument
1777 …return ((val) << A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID__SHIFT) & A3XX_HLSQ_CONTROL_3_REG_IJ… in A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID()
1781 static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID(uint32_t val) in A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID() argument
1783 …return ((val) << A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID__SHIFT) & A3XX_HLSQ_CONTROL_3_REG… in A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID()
1789 static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val) in A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH() argument
1791 …return ((val) << A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) & A3XX_HLSQ_VS_CONTROL_REG_CONSTLENG… in A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
1795 static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val) in A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET() argument
1797 …return ((val) << A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT) & A3XX_HLSQ_VS_CONTROL_REG_CONS… in A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET()
1801 static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val) in A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH() argument
1803 …return ((val) << A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) & A3XX_HLSQ_VS_CONTROL_REG_INSTRLENG… in A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
1809 static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val) in A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH() argument
1811 …return ((val) << A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) & A3XX_HLSQ_FS_CONTROL_REG_CONSTLENG… in A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
1815 static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val) in A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET() argument
1817 …return ((val) << A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT) & A3XX_HLSQ_FS_CONTROL_REG_CONS… in A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET()
1821 static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val) in A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH() argument
1823 …return ((val) << A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) & A3XX_HLSQ_FS_CONTROL_REG_INSTRLENG… in A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
1829 static inline uint32_t A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY(uint32_t val) in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY() argument
1831 …return ((val) << A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY__SHIFT) & A3XX_HLSQ_CONST_VSPRESV_RA… in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY()
1835 static inline uint32_t A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY(uint32_t val) in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY() argument
1837 …return ((val) << A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY__SHIFT) & A3XX_HLSQ_CONST_VSPRESV_RANG… in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY()
1843 static inline uint32_t A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY(uint32_t val) in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY() argument
1845 …return ((val) << A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY__SHIFT) & A3XX_HLSQ_CONST_FSPRESV_RA… in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY()
1849 static inline uint32_t A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY(uint32_t val) in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY() argument
1851 …return ((val) << A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY__SHIFT) & A3XX_HLSQ_CONST_FSPRESV_RANG… in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY()
1857 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM() argument
1859 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__… in A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM()
1863 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0() argument
1865 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALS… in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0()
1869 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1() argument
1871 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALS… in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1()
1875 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2() argument
1877 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALS… in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2()
1905 static inline uint32_t A3XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val) in A3XX_VFD_CONTROL_0_TOTALATTRTOVS() argument
1907 return ((val) << A3XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) & A3XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK; in A3XX_VFD_CONTROL_0_TOTALATTRTOVS()
1911 static inline uint32_t A3XX_VFD_CONTROL_0_PACKETSIZE(uint32_t val) in A3XX_VFD_CONTROL_0_PACKETSIZE() argument
1913 return ((val) << A3XX_VFD_CONTROL_0_PACKETSIZE__SHIFT) & A3XX_VFD_CONTROL_0_PACKETSIZE__MASK; in A3XX_VFD_CONTROL_0_PACKETSIZE()
1917 static inline uint32_t A3XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val) in A3XX_VFD_CONTROL_0_STRMDECINSTRCNT() argument
1919 …return ((val) << A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) & A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__… in A3XX_VFD_CONTROL_0_STRMDECINSTRCNT()
1923 static inline uint32_t A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val) in A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT() argument
1925 …return ((val) << A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) & A3XX_VFD_CONTROL_0_STRMFETCHINSTRC… in A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
1931 static inline uint32_t A3XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val) in A3XX_VFD_CONTROL_1_MAXSTORAGE() argument
1933 return ((val) << A3XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) & A3XX_VFD_CONTROL_1_MAXSTORAGE__MASK; in A3XX_VFD_CONTROL_1_MAXSTORAGE()
1937 static inline uint32_t A3XX_VFD_CONTROL_1_MAXTHRESHOLD(uint32_t val) in A3XX_VFD_CONTROL_1_MAXTHRESHOLD() argument
1939 return ((val) << A3XX_VFD_CONTROL_1_MAXTHRESHOLD__SHIFT) & A3XX_VFD_CONTROL_1_MAXTHRESHOLD__MASK; in A3XX_VFD_CONTROL_1_MAXTHRESHOLD()
1943 static inline uint32_t A3XX_VFD_CONTROL_1_MINTHRESHOLD(uint32_t val) in A3XX_VFD_CONTROL_1_MINTHRESHOLD() argument
1945 return ((val) << A3XX_VFD_CONTROL_1_MINTHRESHOLD__SHIFT) & A3XX_VFD_CONTROL_1_MINTHRESHOLD__MASK; in A3XX_VFD_CONTROL_1_MINTHRESHOLD()
1949 static inline uint32_t A3XX_VFD_CONTROL_1_REGID4VTX(uint32_t val) in A3XX_VFD_CONTROL_1_REGID4VTX() argument
1951 return ((val) << A3XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A3XX_VFD_CONTROL_1_REGID4VTX__MASK; in A3XX_VFD_CONTROL_1_REGID4VTX()
1955 static inline uint32_t A3XX_VFD_CONTROL_1_REGID4INST(uint32_t val) in A3XX_VFD_CONTROL_1_REGID4INST() argument
1957 return ((val) << A3XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A3XX_VFD_CONTROL_1_REGID4INST__MASK; in A3XX_VFD_CONTROL_1_REGID4INST()
1973 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_FETCHSIZE() argument
1975 return ((val) << A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK; in A3XX_VFD_FETCH_INSTR_0_FETCHSIZE()
1979 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE() argument
1981 return ((val) << A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK; in A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
1987 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_INDEXCODE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_INDEXCODE() argument
1989 return ((val) << A3XX_VFD_FETCH_INSTR_0_INDEXCODE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_INDEXCODE__MASK; in A3XX_VFD_FETCH_INSTR_0_INDEXCODE()
1993 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_STEPRATE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_STEPRATE() argument
1995 return ((val) << A3XX_VFD_FETCH_INSTR_0_STEPRATE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_STEPRATE__MASK; in A3XX_VFD_FETCH_INSTR_0_STEPRATE()
2005 static inline uint32_t A3XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val) in A3XX_VFD_DECODE_INSTR_WRITEMASK() argument
2007 return ((val) << A3XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) & A3XX_VFD_DECODE_INSTR_WRITEMASK__MASK; in A3XX_VFD_DECODE_INSTR_WRITEMASK()
2012 static inline uint32_t A3XX_VFD_DECODE_INSTR_FORMAT(enum a3xx_vtx_fmt val) in A3XX_VFD_DECODE_INSTR_FORMAT() argument
2014 return ((val) << A3XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A3XX_VFD_DECODE_INSTR_FORMAT__MASK; in A3XX_VFD_DECODE_INSTR_FORMAT()
2018 static inline uint32_t A3XX_VFD_DECODE_INSTR_REGID(uint32_t val) in A3XX_VFD_DECODE_INSTR_REGID() argument
2020 return ((val) << A3XX_VFD_DECODE_INSTR_REGID__SHIFT) & A3XX_VFD_DECODE_INSTR_REGID__MASK; in A3XX_VFD_DECODE_INSTR_REGID()
2025 static inline uint32_t A3XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val) in A3XX_VFD_DECODE_INSTR_SWAP() argument
2027 return ((val) << A3XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A3XX_VFD_DECODE_INSTR_SWAP__MASK; in A3XX_VFD_DECODE_INSTR_SWAP()
2031 static inline uint32_t A3XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val) in A3XX_VFD_DECODE_INSTR_SHIFTCNT() argument
2033 return ((val) << A3XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) & A3XX_VFD_DECODE_INSTR_SHIFTCNT__MASK; in A3XX_VFD_DECODE_INSTR_SHIFTCNT()
2041 static inline uint32_t A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD(uint32_t val) in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD() argument
2043 …return ((val) << A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD__SHIFT) & A3XX_VFD_VS_THREADING_T… in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD()
2047 static inline uint32_t A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT(uint32_t val) in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT() argument
2049 …return ((val) << A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT__SHIFT) & A3XX_VFD_VS_THREADING_THRE… in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT()
2055 static inline uint32_t A3XX_VPC_ATTR_TOTALATTR(uint32_t val) in A3XX_VPC_ATTR_TOTALATTR() argument
2057 return ((val) << A3XX_VPC_ATTR_TOTALATTR__SHIFT) & A3XX_VPC_ATTR_TOTALATTR__MASK; in A3XX_VPC_ATTR_TOTALATTR()
2062 static inline uint32_t A3XX_VPC_ATTR_THRDASSIGN(uint32_t val) in A3XX_VPC_ATTR_THRDASSIGN() argument
2064 return ((val) << A3XX_VPC_ATTR_THRDASSIGN__SHIFT) & A3XX_VPC_ATTR_THRDASSIGN__MASK; in A3XX_VPC_ATTR_THRDASSIGN()
2068 static inline uint32_t A3XX_VPC_ATTR_LMSIZE(uint32_t val) in A3XX_VPC_ATTR_LMSIZE() argument
2070 return ((val) << A3XX_VPC_ATTR_LMSIZE__SHIFT) & A3XX_VPC_ATTR_LMSIZE__MASK; in A3XX_VPC_ATTR_LMSIZE()
2076 static inline uint32_t A3XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val) in A3XX_VPC_PACK_NUMFPNONPOSVAR() argument
2078 return ((val) << A3XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) & A3XX_VPC_PACK_NUMFPNONPOSVAR__MASK; in A3XX_VPC_PACK_NUMFPNONPOSVAR()
2082 static inline uint32_t A3XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val) in A3XX_VPC_PACK_NUMNONPOSVSVAR() argument
2084 return ((val) << A3XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) & A3XX_VPC_PACK_NUMNONPOSVSVAR__MASK; in A3XX_VPC_PACK_NUMNONPOSVSVAR()
2092 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C0(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C0() argument
2094 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C0__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C0__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C0()
2098 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C1(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C1() argument
2100 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C1__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C1__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C1()
2104 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C2(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C2() argument
2106 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C2__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C2__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C2()
2110 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C3(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C3() argument
2112 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C3__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C3__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C3()
2116 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C4(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C4() argument
2118 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C4__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C4__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C4()
2122 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C5(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C5() argument
2124 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C5__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C5__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C5()
2128 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C6(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C6() argument
2130 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C6__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C6__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C6()
2134 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C7(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C7() argument
2136 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C7__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C7__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C7()
2140 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C8(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C8() argument
2142 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C8__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C8__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C8()
2146 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C9(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C9() argument
2148 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C9__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C9__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C9()
2152 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CA(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CA() argument
2154 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CA__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CA__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CA()
2158 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CB(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CB() argument
2160 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CB__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CB__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CB()
2164 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CC(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CC() argument
2166 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CC__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CC__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CC()
2170 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CD(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CD() argument
2172 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CD__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CD__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CD()
2176 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CE(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CE() argument
2178 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CE__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CE__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CE()
2182 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CF(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CF() argument
2184 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CF__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CF__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CF()
2192 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C0(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C0() argument
2194 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C0__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C0__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C0()
2198 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C1(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C1() argument
2200 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C1__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C1__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C1()
2204 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C2(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C2() argument
2206 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C2__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C2__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C2()
2210 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C3(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C3() argument
2212 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C3__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C3__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C3()
2216 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C4(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C4() argument
2218 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C4__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C4__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C4()
2222 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C5(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C5() argument
2224 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C5__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C5__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C5()
2228 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C6(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C6() argument
2230 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C6__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C6__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C6()
2234 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C7(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C7() argument
2236 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C7__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C7__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C7()
2240 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C8(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C8() argument
2242 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C8__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C8__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C8()
2246 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C9(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C9() argument
2248 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C9__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C9__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C9()
2252 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CA(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CA() argument
2254 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CA__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CA__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CA()
2258 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CB(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CB() argument
2260 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CB__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CB__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CB()
2264 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CC(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CC() argument
2266 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CC__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CC__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CC()
2270 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CD(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CD() argument
2272 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CD__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CD__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CD()
2276 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CE(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CE() argument
2278 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CE__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CE__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CE()
2282 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CF(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CF() argument
2284 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CF__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CF__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CF()
2295 static inline uint32_t A3XX_SP_SP_CTRL_REG_CONSTMODE(uint32_t val) in A3XX_SP_SP_CTRL_REG_CONSTMODE() argument
2297 return ((val) << A3XX_SP_SP_CTRL_REG_CONSTMODE__SHIFT) & A3XX_SP_SP_CTRL_REG_CONSTMODE__MASK; in A3XX_SP_SP_CTRL_REG_CONSTMODE()
2302 static inline uint32_t A3XX_SP_SP_CTRL_REG_SLEEPMODE(uint32_t val) in A3XX_SP_SP_CTRL_REG_SLEEPMODE() argument
2304 return ((val) << A3XX_SP_SP_CTRL_REG_SLEEPMODE__SHIFT) & A3XX_SP_SP_CTRL_REG_SLEEPMODE__MASK; in A3XX_SP_SP_CTRL_REG_SLEEPMODE()
2308 static inline uint32_t A3XX_SP_SP_CTRL_REG_L0MODE(uint32_t val) in A3XX_SP_SP_CTRL_REG_L0MODE() argument
2310 return ((val) << A3XX_SP_SP_CTRL_REG_L0MODE__SHIFT) & A3XX_SP_SP_CTRL_REG_L0MODE__MASK; in A3XX_SP_SP_CTRL_REG_L0MODE()
2316 static inline uint32_t A3XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val) in A3XX_SP_VS_CTRL_REG0_THREADMODE() argument
2318 return ((val) << A3XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) & A3XX_SP_VS_CTRL_REG0_THREADMODE__MASK; in A3XX_SP_VS_CTRL_REG0_THREADMODE()
2322 static inline uint32_t A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val) in A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE() argument
2324 …return ((val) << A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE__SHIFT) & A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMO… in A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE()
2330 static inline uint32_t A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) in A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT() argument
2332 …return ((val) << A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A3XX_SP_VS_CTRL_REG0_HALFREGFOOTP… in A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
2336 static inline uint32_t A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) in A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT() argument
2338 …return ((val) << A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A3XX_SP_VS_CTRL_REG0_FULLREGFOOTP… in A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
2342 static inline uint32_t A3XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) in A3XX_SP_VS_CTRL_REG0_THREADSIZE() argument
2344 return ((val) << A3XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A3XX_SP_VS_CTRL_REG0_THREADSIZE__MASK; in A3XX_SP_VS_CTRL_REG0_THREADSIZE()
2349 static inline uint32_t A3XX_SP_VS_CTRL_REG0_LENGTH(uint32_t val) in A3XX_SP_VS_CTRL_REG0_LENGTH() argument
2351 return ((val) << A3XX_SP_VS_CTRL_REG0_LENGTH__SHIFT) & A3XX_SP_VS_CTRL_REG0_LENGTH__MASK; in A3XX_SP_VS_CTRL_REG0_LENGTH()
2357 static inline uint32_t A3XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val) in A3XX_SP_VS_CTRL_REG1_CONSTLENGTH() argument
2359 return ((val) << A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) & A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK; in A3XX_SP_VS_CTRL_REG1_CONSTLENGTH()
2363 static inline uint32_t A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val) in A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT() argument
2365 …return ((val) << A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT__SHIFT) & A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT… in A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT()
2369 static inline uint32_t A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val) in A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING() argument
2371 …return ((val) << A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A3XX_SP_VS_CTRL_REG1_INITIALOUT… in A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
2377 static inline uint32_t A3XX_SP_VS_PARAM_REG_POSREGID(uint32_t val) in A3XX_SP_VS_PARAM_REG_POSREGID() argument
2379 return ((val) << A3XX_SP_VS_PARAM_REG_POSREGID__SHIFT) & A3XX_SP_VS_PARAM_REG_POSREGID__MASK; in A3XX_SP_VS_PARAM_REG_POSREGID()
2383 static inline uint32_t A3XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val) in A3XX_SP_VS_PARAM_REG_PSIZEREGID() argument
2385 return ((val) << A3XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) & A3XX_SP_VS_PARAM_REG_PSIZEREGID__MASK; in A3XX_SP_VS_PARAM_REG_PSIZEREGID()
2390 static inline uint32_t A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val) in A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR() argument
2392 …return ((val) << A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) & A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__… in A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
2400 static inline uint32_t A3XX_SP_VS_OUT_REG_A_REGID(uint32_t val) in A3XX_SP_VS_OUT_REG_A_REGID() argument
2402 return ((val) << A3XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A3XX_SP_VS_OUT_REG_A_REGID__MASK; in A3XX_SP_VS_OUT_REG_A_REGID()
2407 static inline uint32_t A3XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val) in A3XX_SP_VS_OUT_REG_A_COMPMASK() argument
2409 return ((val) << A3XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A3XX_SP_VS_OUT_REG_A_COMPMASK__MASK; in A3XX_SP_VS_OUT_REG_A_COMPMASK()
2413 static inline uint32_t A3XX_SP_VS_OUT_REG_B_REGID(uint32_t val) in A3XX_SP_VS_OUT_REG_B_REGID() argument
2415 return ((val) << A3XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A3XX_SP_VS_OUT_REG_B_REGID__MASK; in A3XX_SP_VS_OUT_REG_B_REGID()
2420 static inline uint32_t A3XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val) in A3XX_SP_VS_OUT_REG_B_COMPMASK() argument
2422 return ((val) << A3XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A3XX_SP_VS_OUT_REG_B_COMPMASK__MASK; in A3XX_SP_VS_OUT_REG_B_COMPMASK()
2430 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC0() argument
2432 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC0()
2436 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC1() argument
2438 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC1()
2442 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC2() argument
2444 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC2()
2448 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC3() argument
2450 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC3()
2456 static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val) in A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET() argument
2458 …return ((val) << A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT) & A3XX_SP_VS_OBJ_OFFSET_RE… in A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET()
2462 static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val) in A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET() argument
2464 …return ((val) << A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A3XX_SP_VS_OBJ_OFFSET_REG_C… in A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2468 static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val) in A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET() argument
2470 …return ((val) << A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A3XX_SP_VS_OBJ_OFFSET_REG_SHA… in A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2478 static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val) in A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM() argument
2480 …return ((val) << A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT) & A3XX_SP_VS_PVT_MEM_PARAM_RE… in A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM()
2484 static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val) in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET() argument
2486 …return ((val) << A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT) & A3XX_SP_VS_PVT_MEM_PARAM_REG… in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET()
2490 static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val) in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD() argument
2492 …return ((val) << A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT) & A3XX_SP_VS_PVT_MEM_PA… in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD()
2498 static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val) in A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN() argument
2500 …return ((val) << A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT) & A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTL… in A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN()
2504 static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) in A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS() argument
2506 …return ((val >> 5) << A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) & A3XX_SP_VS_PVT_MEM_… in A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS()
2514 static inline uint32_t A3XX_SP_VS_LENGTH_REG_SHADERLENGTH(uint32_t val) in A3XX_SP_VS_LENGTH_REG_SHADERLENGTH() argument
2516 …return ((val) << A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__SHIFT) & A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__… in A3XX_SP_VS_LENGTH_REG_SHADERLENGTH()
2522 static inline uint32_t A3XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val) in A3XX_SP_FS_CTRL_REG0_THREADMODE() argument
2524 return ((val) << A3XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) & A3XX_SP_FS_CTRL_REG0_THREADMODE__MASK; in A3XX_SP_FS_CTRL_REG0_THREADMODE()
2528 static inline uint32_t A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val) in A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE() argument
2530 …return ((val) << A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE__SHIFT) & A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMO… in A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE()
2536 static inline uint32_t A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) in A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT() argument
2538 …return ((val) << A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A3XX_SP_FS_CTRL_REG0_HALFREGFOOTP… in A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
2542 static inline uint32_t A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) in A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT() argument
2544 …return ((val) << A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A3XX_SP_FS_CTRL_REG0_FULLREGFOOTP… in A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
2551 static inline uint32_t A3XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) in A3XX_SP_FS_CTRL_REG0_THREADSIZE() argument
2553 return ((val) << A3XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A3XX_SP_FS_CTRL_REG0_THREADSIZE__MASK; in A3XX_SP_FS_CTRL_REG0_THREADSIZE()
2560 static inline uint32_t A3XX_SP_FS_CTRL_REG0_LENGTH(uint32_t val) in A3XX_SP_FS_CTRL_REG0_LENGTH() argument
2562 return ((val) << A3XX_SP_FS_CTRL_REG0_LENGTH__SHIFT) & A3XX_SP_FS_CTRL_REG0_LENGTH__MASK; in A3XX_SP_FS_CTRL_REG0_LENGTH()
2568 static inline uint32_t A3XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val) in A3XX_SP_FS_CTRL_REG1_CONSTLENGTH() argument
2570 return ((val) << A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) & A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK; in A3XX_SP_FS_CTRL_REG1_CONSTLENGTH()
2574 static inline uint32_t A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val) in A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT() argument
2576 …return ((val) << A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT__SHIFT) & A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT… in A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT()
2580 static inline uint32_t A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val) in A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING() argument
2582 …return ((val) << A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A3XX_SP_FS_CTRL_REG1_INITIALOUT… in A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING()
2586 static inline uint32_t A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET(uint32_t val) in A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET() argument
2588 …return ((val) << A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET__SHIFT) & A3XX_SP_FS_CTRL_REG1_HALFPRECVAR… in A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET()
2594 static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val) in A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET() argument
2596 …return ((val) << A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT) & A3XX_SP_FS_OBJ_OFFSET_RE… in A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET()
2600 static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val) in A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET() argument
2602 …return ((val) << A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A3XX_SP_FS_OBJ_OFFSET_REG_C… in A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2606 static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val) in A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET() argument
2608 …return ((val) << A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A3XX_SP_FS_OBJ_OFFSET_REG_SHA… in A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2616 static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val) in A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM() argument
2618 …return ((val) << A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT) & A3XX_SP_FS_PVT_MEM_PARAM_RE… in A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM()
2622 static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val) in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET() argument
2624 …return ((val) << A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT) & A3XX_SP_FS_PVT_MEM_PARAM_REG… in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET()
2628 static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val) in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD() argument
2630 …return ((val) << A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT) & A3XX_SP_FS_PVT_MEM_PA… in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD()
2636 static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val) in A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN() argument
2638 …return ((val) << A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT) & A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTL… in A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN()
2642 static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) in A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS() argument
2644 …return ((val >> 5) << A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) & A3XX_SP_FS_PVT_MEM_… in A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS()
2656 static inline uint32_t A3XX_SP_FS_OUTPUT_REG_MRT(uint32_t val) in A3XX_SP_FS_OUTPUT_REG_MRT() argument
2658 return ((val) << A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A3XX_SP_FS_OUTPUT_REG_MRT__MASK; in A3XX_SP_FS_OUTPUT_REG_MRT()
2663 static inline uint32_t A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val) in A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID() argument
2665 …return ((val) << A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) & A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MA… in A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
2673 static inline uint32_t A3XX_SP_FS_MRT_REG_REGID(uint32_t val) in A3XX_SP_FS_MRT_REG_REGID() argument
2675 return ((val) << A3XX_SP_FS_MRT_REG_REGID__SHIFT) & A3XX_SP_FS_MRT_REG_REGID__MASK; in A3XX_SP_FS_MRT_REG_REGID()
2686 static inline uint32_t A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT(enum a3xx_color_fmt val) in A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT() argument
2688 …return ((val) << A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT__SHIFT) & A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFO… in A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT()
2694 static inline uint32_t A3XX_SP_FS_LENGTH_REG_SHADERLENGTH(uint32_t val) in A3XX_SP_FS_LENGTH_REG_SHADERLENGTH() argument
2696 …return ((val) << A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__SHIFT) & A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__… in A3XX_SP_FS_LENGTH_REG_SHADERLENGTH()
2704 static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val) in A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET() argument
2706 …return ((val) << A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__SHIFT) & A3XX_TPL1_TP_VS_TEX_OFFSET_SAM… in A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET()
2710 static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val) in A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET() argument
2712 …return ((val) << A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET__SHIFT) & A3XX_TPL1_TP_VS_TEX_OFFSET_MEMO… in A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET()
2716 static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR(uint32_t val) in A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR() argument
2718 …return ((val) << A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR__SHIFT) & A3XX_TPL1_TP_VS_TEX_OFFSET_BASE… in A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR()
2726 static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val) in A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET() argument
2728 …return ((val) << A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET__SHIFT) & A3XX_TPL1_TP_FS_TEX_OFFSET_SAM… in A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET()
2732 static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val) in A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET() argument
2734 …return ((val) << A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET__SHIFT) & A3XX_TPL1_TP_FS_TEX_OFFSET_MEMO… in A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET()
2738 static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR(uint32_t val) in A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR() argument
2740 …return ((val) << A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR__SHIFT) & A3XX_TPL1_TP_FS_TEX_OFFSET_BASE… in A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR()
2822 static inline uint32_t A3XX_VSC_BIN_SIZE_WIDTH(uint32_t val) in A3XX_VSC_BIN_SIZE_WIDTH() argument
2824 return ((val >> 5) << A3XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A3XX_VSC_BIN_SIZE_WIDTH__MASK; in A3XX_VSC_BIN_SIZE_WIDTH()
2828 static inline uint32_t A3XX_VSC_BIN_SIZE_HEIGHT(uint32_t val) in A3XX_VSC_BIN_SIZE_HEIGHT() argument
2830 return ((val >> 5) << A3XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A3XX_VSC_BIN_SIZE_HEIGHT__MASK; in A3XX_VSC_BIN_SIZE_HEIGHT()
2840 static inline uint32_t A3XX_VSC_PIPE_CONFIG_X(uint32_t val) in A3XX_VSC_PIPE_CONFIG_X() argument
2842 return ((val) << A3XX_VSC_PIPE_CONFIG_X__SHIFT) & A3XX_VSC_PIPE_CONFIG_X__MASK; in A3XX_VSC_PIPE_CONFIG_X()
2846 static inline uint32_t A3XX_VSC_PIPE_CONFIG_Y(uint32_t val) in A3XX_VSC_PIPE_CONFIG_Y() argument
2848 return ((val) << A3XX_VSC_PIPE_CONFIG_Y__SHIFT) & A3XX_VSC_PIPE_CONFIG_Y__MASK; in A3XX_VSC_PIPE_CONFIG_Y()
2852 static inline uint32_t A3XX_VSC_PIPE_CONFIG_W(uint32_t val) in A3XX_VSC_PIPE_CONFIG_W() argument
2854 return ((val) << A3XX_VSC_PIPE_CONFIG_W__SHIFT) & A3XX_VSC_PIPE_CONFIG_W__MASK; in A3XX_VSC_PIPE_CONFIG_W()
2858 static inline uint32_t A3XX_VSC_PIPE_CONFIG_H(uint32_t val) in A3XX_VSC_PIPE_CONFIG_H() argument
2860 return ((val) << A3XX_VSC_PIPE_CONFIG_H__SHIFT) & A3XX_VSC_PIPE_CONFIG_H__MASK; in A3XX_VSC_PIPE_CONFIG_H()
2911 static inline uint32_t A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) in A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH() argument
2913 …return ((val) << A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) & A3XX_RB_FRAME_BUFFER_DIMENSION_WID… in A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
2917 static inline uint32_t A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) in A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT() argument
2919 …return ((val) << A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) & A3XX_RB_FRAME_BUFFER_DIMENSION_HE… in A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
2965 static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(uint32_t val) in A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR() argument
2967 …return ((val) << A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR__SHIFT) & A3XX_UCHE_CACHE_INVALIDATE0_REG_AD… in A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR()
2973 static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(uint32_t val) in A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR() argument
2975 …return ((val) << A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR__SHIFT) & A3XX_UCHE_CACHE_INVALIDATE1_REG_AD… in A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR()
2979 static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(enum a3xx_cache_opcode val) in A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE() argument
2981 …return ((val) << A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE__SHIFT) & A3XX_UCHE_CACHE_INVALIDATE1_REG_… in A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE()
3026 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val) in A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE() argument
3028 …return ((val) << A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT) & A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MA… in A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE()
3032 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val) in A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT() argument
3034 …return ((val) << A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT) & A3XX_VGT_DRAW_INITIATOR_SOURCE_SE… in A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT()
3038 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val) in A3XX_VGT_DRAW_INITIATOR_VIS_CULL() argument
3040 return ((val) << A3XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT) & A3XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK; in A3XX_VGT_DRAW_INITIATOR_VIS_CULL()
3044 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val) in A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE() argument
3046 …return ((val) << A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT) & A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__… in A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE()
3053 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val) in A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES() argument
3055 …return ((val) << A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) & A3XX_VGT_DRAW_INITIATOR_NUM_INSTA… in A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES()
3065 static inline uint32_t A3XX_TEX_SAMP_0_XY_MAG(enum a3xx_tex_filter val) in A3XX_TEX_SAMP_0_XY_MAG() argument
3067 return ((val) << A3XX_TEX_SAMP_0_XY_MAG__SHIFT) & A3XX_TEX_SAMP_0_XY_MAG__MASK; in A3XX_TEX_SAMP_0_XY_MAG()
3071 static inline uint32_t A3XX_TEX_SAMP_0_XY_MIN(enum a3xx_tex_filter val) in A3XX_TEX_SAMP_0_XY_MIN() argument
3073 return ((val) << A3XX_TEX_SAMP_0_XY_MIN__SHIFT) & A3XX_TEX_SAMP_0_XY_MIN__MASK; in A3XX_TEX_SAMP_0_XY_MIN()
3077 static inline uint32_t A3XX_TEX_SAMP_0_WRAP_S(enum a3xx_tex_clamp val) in A3XX_TEX_SAMP_0_WRAP_S() argument
3079 return ((val) << A3XX_TEX_SAMP_0_WRAP_S__SHIFT) & A3XX_TEX_SAMP_0_WRAP_S__MASK; in A3XX_TEX_SAMP_0_WRAP_S()
3083 static inline uint32_t A3XX_TEX_SAMP_0_WRAP_T(enum a3xx_tex_clamp val) in A3XX_TEX_SAMP_0_WRAP_T() argument
3085 return ((val) << A3XX_TEX_SAMP_0_WRAP_T__SHIFT) & A3XX_TEX_SAMP_0_WRAP_T__MASK; in A3XX_TEX_SAMP_0_WRAP_T()
3089 static inline uint32_t A3XX_TEX_SAMP_0_WRAP_R(enum a3xx_tex_clamp val) in A3XX_TEX_SAMP_0_WRAP_R() argument
3091 return ((val) << A3XX_TEX_SAMP_0_WRAP_R__SHIFT) & A3XX_TEX_SAMP_0_WRAP_R__MASK; in A3XX_TEX_SAMP_0_WRAP_R()
3095 static inline uint32_t A3XX_TEX_SAMP_0_ANISO(enum a3xx_tex_aniso val) in A3XX_TEX_SAMP_0_ANISO() argument
3097 return ((val) << A3XX_TEX_SAMP_0_ANISO__SHIFT) & A3XX_TEX_SAMP_0_ANISO__MASK; in A3XX_TEX_SAMP_0_ANISO()
3101 static inline uint32_t A3XX_TEX_SAMP_0_COMPARE_FUNC(enum adreno_compare_func val) in A3XX_TEX_SAMP_0_COMPARE_FUNC() argument
3103 return ((val) << A3XX_TEX_SAMP_0_COMPARE_FUNC__SHIFT) & A3XX_TEX_SAMP_0_COMPARE_FUNC__MASK; in A3XX_TEX_SAMP_0_COMPARE_FUNC()
3111 static inline uint32_t A3XX_TEX_SAMP_1_LOD_BIAS(float val) in A3XX_TEX_SAMP_1_LOD_BIAS() argument
3113 …return ((((int32_t)(val * 64.0))) << A3XX_TEX_SAMP_1_LOD_BIAS__SHIFT) & A3XX_TEX_SAMP_1_LOD_BIAS__… in A3XX_TEX_SAMP_1_LOD_BIAS()
3117 static inline uint32_t A3XX_TEX_SAMP_1_MAX_LOD(float val) in A3XX_TEX_SAMP_1_MAX_LOD() argument
3119 …return ((((uint32_t)(val * 64.0))) << A3XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A3XX_TEX_SAMP_1_MAX_LOD__M… in A3XX_TEX_SAMP_1_MAX_LOD()
3123 static inline uint32_t A3XX_TEX_SAMP_1_MIN_LOD(float val) in A3XX_TEX_SAMP_1_MIN_LOD() argument
3125 …return ((((uint32_t)(val * 64.0))) << A3XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A3XX_TEX_SAMP_1_MIN_LOD__M… in A3XX_TEX_SAMP_1_MIN_LOD()
3131 static inline uint32_t A3XX_TEX_CONST_0_TILE_MODE(enum a3xx_tile_mode val) in A3XX_TEX_CONST_0_TILE_MODE() argument
3133 return ((val) << A3XX_TEX_CONST_0_TILE_MODE__SHIFT) & A3XX_TEX_CONST_0_TILE_MODE__MASK; in A3XX_TEX_CONST_0_TILE_MODE()
3138 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_X(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_X() argument
3140 return ((val) << A3XX_TEX_CONST_0_SWIZ_X__SHIFT) & A3XX_TEX_CONST_0_SWIZ_X__MASK; in A3XX_TEX_CONST_0_SWIZ_X()
3144 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_Y(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_Y() argument
3146 return ((val) << A3XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A3XX_TEX_CONST_0_SWIZ_Y__MASK; in A3XX_TEX_CONST_0_SWIZ_Y()
3150 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_Z(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_Z() argument
3152 return ((val) << A3XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A3XX_TEX_CONST_0_SWIZ_Z__MASK; in A3XX_TEX_CONST_0_SWIZ_Z()
3156 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_W(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_W() argument
3158 return ((val) << A3XX_TEX_CONST_0_SWIZ_W__SHIFT) & A3XX_TEX_CONST_0_SWIZ_W__MASK; in A3XX_TEX_CONST_0_SWIZ_W()
3162 static inline uint32_t A3XX_TEX_CONST_0_MIPLVLS(uint32_t val) in A3XX_TEX_CONST_0_MIPLVLS() argument
3164 return ((val) << A3XX_TEX_CONST_0_MIPLVLS__SHIFT) & A3XX_TEX_CONST_0_MIPLVLS__MASK; in A3XX_TEX_CONST_0_MIPLVLS()
3168 static inline uint32_t A3XX_TEX_CONST_0_MSAATEX(enum a3xx_tex_msaa val) in A3XX_TEX_CONST_0_MSAATEX() argument
3170 return ((val) << A3XX_TEX_CONST_0_MSAATEX__SHIFT) & A3XX_TEX_CONST_0_MSAATEX__MASK; in A3XX_TEX_CONST_0_MSAATEX()
3174 static inline uint32_t A3XX_TEX_CONST_0_FMT(enum a3xx_tex_fmt val) in A3XX_TEX_CONST_0_FMT() argument
3176 return ((val) << A3XX_TEX_CONST_0_FMT__SHIFT) & A3XX_TEX_CONST_0_FMT__MASK; in A3XX_TEX_CONST_0_FMT()
3181 static inline uint32_t A3XX_TEX_CONST_0_TYPE(enum a3xx_tex_type val) in A3XX_TEX_CONST_0_TYPE() argument
3183 return ((val) << A3XX_TEX_CONST_0_TYPE__SHIFT) & A3XX_TEX_CONST_0_TYPE__MASK; in A3XX_TEX_CONST_0_TYPE()
3189 static inline uint32_t A3XX_TEX_CONST_1_HEIGHT(uint32_t val) in A3XX_TEX_CONST_1_HEIGHT() argument
3191 return ((val) << A3XX_TEX_CONST_1_HEIGHT__SHIFT) & A3XX_TEX_CONST_1_HEIGHT__MASK; in A3XX_TEX_CONST_1_HEIGHT()
3195 static inline uint32_t A3XX_TEX_CONST_1_WIDTH(uint32_t val) in A3XX_TEX_CONST_1_WIDTH() argument
3197 return ((val) << A3XX_TEX_CONST_1_WIDTH__SHIFT) & A3XX_TEX_CONST_1_WIDTH__MASK; in A3XX_TEX_CONST_1_WIDTH()
3201 static inline uint32_t A3XX_TEX_CONST_1_PITCHALIGN(uint32_t val) in A3XX_TEX_CONST_1_PITCHALIGN() argument
3203 return ((val) << A3XX_TEX_CONST_1_PITCHALIGN__SHIFT) & A3XX_TEX_CONST_1_PITCHALIGN__MASK; in A3XX_TEX_CONST_1_PITCHALIGN()
3209 static inline uint32_t A3XX_TEX_CONST_2_INDX(uint32_t val) in A3XX_TEX_CONST_2_INDX() argument
3211 return ((val) << A3XX_TEX_CONST_2_INDX__SHIFT) & A3XX_TEX_CONST_2_INDX__MASK; in A3XX_TEX_CONST_2_INDX()
3215 static inline uint32_t A3XX_TEX_CONST_2_PITCH(uint32_t val) in A3XX_TEX_CONST_2_PITCH() argument
3217 return ((val) << A3XX_TEX_CONST_2_PITCH__SHIFT) & A3XX_TEX_CONST_2_PITCH__MASK; in A3XX_TEX_CONST_2_PITCH()
3221 static inline uint32_t A3XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val) in A3XX_TEX_CONST_2_SWAP() argument
3223 return ((val) << A3XX_TEX_CONST_2_SWAP__SHIFT) & A3XX_TEX_CONST_2_SWAP__MASK; in A3XX_TEX_CONST_2_SWAP()
3229 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val) in A3XX_TEX_CONST_3_LAYERSZ1() argument
3231 return ((val >> 12) << A3XX_TEX_CONST_3_LAYERSZ1__SHIFT) & A3XX_TEX_CONST_3_LAYERSZ1__MASK; in A3XX_TEX_CONST_3_LAYERSZ1()
3235 static inline uint32_t A3XX_TEX_CONST_3_DEPTH(uint32_t val) in A3XX_TEX_CONST_3_DEPTH() argument
3237 return ((val) << A3XX_TEX_CONST_3_DEPTH__SHIFT) & A3XX_TEX_CONST_3_DEPTH__MASK; in A3XX_TEX_CONST_3_DEPTH()
3241 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ2(uint32_t val) in A3XX_TEX_CONST_3_LAYERSZ2() argument
3243 return ((val >> 12) << A3XX_TEX_CONST_3_LAYERSZ2__SHIFT) & A3XX_TEX_CONST_3_LAYERSZ2__MASK; in A3XX_TEX_CONST_3_LAYERSZ2()