Lines Matching refs:mipi_dsi

54 static void meson_dw_mipi_dsi_hw_init(struct meson_dw_mipi_dsi *mipi_dsi)  in meson_dw_mipi_dsi_hw_init()  argument
61 mipi_dsi->base + MIPI_DSI_TOP_SW_RESET); in meson_dw_mipi_dsi_hw_init()
64 0, mipi_dsi->base + MIPI_DSI_TOP_SW_RESET); in meson_dw_mipi_dsi_hw_init()
69 mipi_dsi->base + MIPI_DSI_TOP_CLK_CNTL); in meson_dw_mipi_dsi_hw_init()
72 writel_relaxed(0, mipi_dsi->base + MIPI_DSI_TOP_MEM_PD); in meson_dw_mipi_dsi_hw_init()
77 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in dw_mipi_dsi_phy_init() local
82 ret = clk_set_rate(mipi_dsi->bit_clk, in dw_mipi_dsi_phy_init()
83 mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate); in dw_mipi_dsi_phy_init()
85 dev_err(mipi_dsi->dev, "Failed to set DSI Bit clock rate %lu (ret %d)\n", in dw_mipi_dsi_phy_init()
86 mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate, ret); in dw_mipi_dsi_phy_init()
91 ret = clk_rate_exclusive_get(mipi_dsi->bit_clk); in dw_mipi_dsi_phy_init()
93 dev_err(mipi_dsi->dev, in dw_mipi_dsi_phy_init()
98 clk_disable_unprepare(mipi_dsi->px_clk); in dw_mipi_dsi_phy_init()
99 ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); in dw_mipi_dsi_phy_init()
102 dev_err(mipi_dsi->dev, "Failed to set DSI Pixel clock rate %u (%d)\n", in dw_mipi_dsi_phy_init()
103 mipi_dsi->mode->clock * 1000, ret); in dw_mipi_dsi_phy_init()
107 ret = clk_prepare_enable(mipi_dsi->px_clk); in dw_mipi_dsi_phy_init()
109 dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); in dw_mipi_dsi_phy_init()
113 switch (mipi_dsi->dsi_device->format) { in dw_mipi_dsi_phy_init()
133 mipi_dsi->base + MIPI_DSI_TOP_CNTL); in dw_mipi_dsi_phy_init()
135 return phy_configure(mipi_dsi->phy, &mipi_dsi->phy_opts); in dw_mipi_dsi_phy_init()
140 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in dw_mipi_dsi_phy_power_on() local
142 if (phy_power_on(mipi_dsi->phy)) in dw_mipi_dsi_phy_power_on()
143 dev_warn(mipi_dsi->dev, "Failed to power on PHY\n"); in dw_mipi_dsi_phy_power_on()
148 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in dw_mipi_dsi_phy_power_off() local
150 if (phy_power_off(mipi_dsi->phy)) in dw_mipi_dsi_phy_power_off()
151 dev_warn(mipi_dsi->dev, "Failed to power off PHY\n"); in dw_mipi_dsi_phy_power_off()
154 clk_rate_exclusive_put(mipi_dsi->bit_clk); in dw_mipi_dsi_phy_power_off()
162 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in dw_mipi_dsi_get_lane_mbps() local
165 mipi_dsi->mode = mode; in dw_mipi_dsi_get_lane_mbps()
167 bpp = mipi_dsi_pixel_format_to_bpp(mipi_dsi->dsi_device->format); in dw_mipi_dsi_get_lane_mbps()
170 bpp, mipi_dsi->dsi_device->lanes, in dw_mipi_dsi_get_lane_mbps()
171 &mipi_dsi->phy_opts.mipi_dphy); in dw_mipi_dsi_get_lane_mbps()
173 *lane_mbps = DIV_ROUND_UP(mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate, USEC_PER_SEC); in dw_mipi_dsi_get_lane_mbps()
182 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in dw_mipi_dsi_phy_get_timing() local
184 switch (mipi_dsi->mode->hdisplay) { in dw_mipi_dsi_phy_get_timing()
225 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in meson_dw_mipi_dsi_host_attach() local
228 mipi_dsi->dsi_device = device; in meson_dw_mipi_dsi_host_attach()
237 dev_err(mipi_dsi->dev, "invalid pixel format %d\n", device->format); in meson_dw_mipi_dsi_host_attach()
241 ret = phy_init(mipi_dsi->phy); in meson_dw_mipi_dsi_host_attach()
245 meson_dw_mipi_dsi_hw_init(mipi_dsi); in meson_dw_mipi_dsi_host_attach()
253 struct meson_dw_mipi_dsi *mipi_dsi = priv_data; in meson_dw_mipi_dsi_host_detach() local
255 if (device == mipi_dsi->dsi_device) in meson_dw_mipi_dsi_host_detach()
256 mipi_dsi->dsi_device = NULL; in meson_dw_mipi_dsi_host_detach()
260 return phy_exit(mipi_dsi->phy); in meson_dw_mipi_dsi_host_detach()
270 struct meson_dw_mipi_dsi *mipi_dsi; in meson_dw_mipi_dsi_probe() local
273 mipi_dsi = devm_kzalloc(dev, sizeof(*mipi_dsi), GFP_KERNEL); in meson_dw_mipi_dsi_probe()
274 if (!mipi_dsi) in meson_dw_mipi_dsi_probe()
277 mipi_dsi->base = devm_platform_ioremap_resource(pdev, 0); in meson_dw_mipi_dsi_probe()
278 if (IS_ERR(mipi_dsi->base)) in meson_dw_mipi_dsi_probe()
279 return PTR_ERR(mipi_dsi->base); in meson_dw_mipi_dsi_probe()
281 mipi_dsi->phy = devm_phy_get(dev, "dphy"); in meson_dw_mipi_dsi_probe()
282 if (IS_ERR(mipi_dsi->phy)) in meson_dw_mipi_dsi_probe()
283 return dev_err_probe(dev, PTR_ERR(mipi_dsi->phy), in meson_dw_mipi_dsi_probe()
286 mipi_dsi->bit_clk = devm_clk_get_enabled(dev, "bit"); in meson_dw_mipi_dsi_probe()
287 if (IS_ERR(mipi_dsi->bit_clk)) { in meson_dw_mipi_dsi_probe()
288 int ret = PTR_ERR(mipi_dsi->bit_clk); in meson_dw_mipi_dsi_probe()
297 mipi_dsi->px_clk = devm_clk_get_enabled(dev, "px"); in meson_dw_mipi_dsi_probe()
298 if (IS_ERR(mipi_dsi->px_clk)) in meson_dw_mipi_dsi_probe()
299 return dev_err_probe(dev, PTR_ERR(mipi_dsi->px_clk), in meson_dw_mipi_dsi_probe()
306 mipi_dsi->top_rst = devm_reset_control_get_exclusive(dev, "top"); in meson_dw_mipi_dsi_probe()
307 if (IS_ERR(mipi_dsi->top_rst)) in meson_dw_mipi_dsi_probe()
308 return dev_err_probe(dev, PTR_ERR(mipi_dsi->top_rst), in meson_dw_mipi_dsi_probe()
311 reset_control_assert(mipi_dsi->top_rst); in meson_dw_mipi_dsi_probe()
313 reset_control_deassert(mipi_dsi->top_rst); in meson_dw_mipi_dsi_probe()
317 mipi_dsi->dev = dev; in meson_dw_mipi_dsi_probe()
318 mipi_dsi->pdata.base = mipi_dsi->base; in meson_dw_mipi_dsi_probe()
319 mipi_dsi->pdata.max_data_lanes = 4; in meson_dw_mipi_dsi_probe()
320 mipi_dsi->pdata.phy_ops = &meson_dw_mipi_dsi_phy_ops; in meson_dw_mipi_dsi_probe()
321 mipi_dsi->pdata.host_ops = &meson_dw_mipi_dsi_host_ops; in meson_dw_mipi_dsi_probe()
322 mipi_dsi->pdata.priv_data = mipi_dsi; in meson_dw_mipi_dsi_probe()
323 platform_set_drvdata(pdev, mipi_dsi); in meson_dw_mipi_dsi_probe()
325 mipi_dsi->dmd = dw_mipi_dsi_probe(pdev, &mipi_dsi->pdata); in meson_dw_mipi_dsi_probe()
326 if (IS_ERR(mipi_dsi->dmd)) in meson_dw_mipi_dsi_probe()
327 return dev_err_probe(dev, PTR_ERR(mipi_dsi->dmd), in meson_dw_mipi_dsi_probe()
335 struct meson_dw_mipi_dsi *mipi_dsi = platform_get_drvdata(pdev); in meson_dw_mipi_dsi_remove() local
337 dw_mipi_dsi_remove(mipi_dsi->dmd); in meson_dw_mipi_dsi_remove()