Lines Matching refs:target_lane_count
1478 u8 target_lane_count)
1484 target_lane_count | DP_LANE_COUNT_ENHANCED_FRAME_EN);
1490 mtk_dp_set_lanes(mtk_dp, target_lane_count / 2);
1491 ret = mtk_dp_phy_configure(mtk_dp, target_link_rate, target_lane_count);
1496 "Link train target_link_rate = 0x%x, target_lane_count = 0x%x\n",
1497 target_link_rate, target_lane_count);
1502 static int mtk_dp_train_cr(struct mtk_dp *mtk_dp, u8 target_lane_count)
1522 mtk_dp_train_update_swing_pre(mtk_dp, target_lane_count,
1531 target_lane_count)) {
1573 static int mtk_dp_train_eq(struct mtk_dp *mtk_dp, u8 target_lane_count)
1590 mtk_dp_train_update_swing_pre(mtk_dp, target_lane_count,
1598 if (drm_dp_channel_eq_ok(link_status, target_lane_count)) {