Lines Matching refs:d
69 struct mcde_dsi *d; in mcde_dsi_irq() local
73 d = host_to_mcde_dsi(mdsi->host); in mcde_dsi_irq()
75 dev_dbg(d->dev, "%s called\n", __func__); in mcde_dsi_irq()
77 val = readl(d->regs + DSI_DIRECT_CMD_STS_FLAG); in mcde_dsi_irq()
79 dev_dbg(d->dev, "DSI_DIRECT_CMD_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
81 dev_dbg(d->dev, "direct command write completed\n"); in mcde_dsi_irq()
84 dev_dbg(d->dev, "direct command TE received\n"); in mcde_dsi_irq()
87 dev_err(d->dev, "direct command ACK ERR received\n"); in mcde_dsi_irq()
89 dev_err(d->dev, "direct command read ERR received\n"); in mcde_dsi_irq()
91 writel(val, d->regs + DSI_DIRECT_CMD_STS_CLR); in mcde_dsi_irq()
93 val = readl(d->regs + DSI_CMD_MODE_STS_FLAG); in mcde_dsi_irq()
95 dev_dbg(d->dev, "DSI_CMD_MODE_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
98 dev_dbg(d->dev, "CMD mode no TE\n"); in mcde_dsi_irq()
101 dev_dbg(d->dev, "CMD mode TE miss\n"); in mcde_dsi_irq()
103 dev_err(d->dev, "CMD mode SD1 underrun\n"); in mcde_dsi_irq()
105 dev_err(d->dev, "CMD mode SD2 underrun\n"); in mcde_dsi_irq()
107 dev_err(d->dev, "CMD mode unwanted RD\n"); in mcde_dsi_irq()
108 writel(val, d->regs + DSI_CMD_MODE_STS_CLR); in mcde_dsi_irq()
110 val = readl(d->regs + DSI_DIRECT_CMD_RD_STS_FLAG); in mcde_dsi_irq()
112 dev_dbg(d->dev, "DSI_DIRECT_CMD_RD_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
113 writel(val, d->regs + DSI_DIRECT_CMD_RD_STS_CLR); in mcde_dsi_irq()
115 val = readl(d->regs + DSI_TG_STS_FLAG); in mcde_dsi_irq()
117 dev_dbg(d->dev, "DSI_TG_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
118 writel(val, d->regs + DSI_TG_STS_CLR); in mcde_dsi_irq()
120 val = readl(d->regs + DSI_VID_MODE_STS_FLAG); in mcde_dsi_irq()
122 dev_dbg(d->dev, "DSI_VID_MODE_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
124 dev_dbg(d->dev, "VID mode VSG running\n"); in mcde_dsi_irq()
126 dev_err(d->dev, "VID mode missing data\n"); in mcde_dsi_irq()
128 dev_err(d->dev, "VID mode missing HSYNC\n"); in mcde_dsi_irq()
130 dev_err(d->dev, "VID mode missing VSYNC\n"); in mcde_dsi_irq()
132 dev_err(d->dev, "VID mode less bytes than expected between two HSYNC\n"); in mcde_dsi_irq()
134 dev_err(d->dev, "VID mode less lines than expected between two VSYNC\n"); in mcde_dsi_irq()
138 dev_err(d->dev, "VID mode read/write error\n"); in mcde_dsi_irq()
140 dev_err(d->dev, "VID mode received packets differ from expected size\n"); in mcde_dsi_irq()
142 dev_err(d->dev, "VID mode VSG in recovery mode\n"); in mcde_dsi_irq()
143 writel(val, d->regs + DSI_VID_MODE_STS_CLR); in mcde_dsi_irq()
148 static void mcde_dsi_attach_to_mcde(struct mcde_dsi *d) in mcde_dsi_attach_to_mcde() argument
150 d->mcde->mdsi = d->mdsi; in mcde_dsi_attach_to_mcde()
164 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) in mcde_dsi_attach_to_mcde()
165 d->mcde->flow_mode = MCDE_VIDEO_FORMATTER_FLOW; in mcde_dsi_attach_to_mcde()
167 d->mcde->flow_mode = MCDE_COMMAND_TE_FLOW; in mcde_dsi_attach_to_mcde()
173 struct mcde_dsi *d = host_to_mcde_dsi(host); in mcde_dsi_host_attach() local
180 dev_info(d->dev, "attached DSI device with %d lanes\n", mdsi->lanes); in mcde_dsi_host_attach()
182 dev_info(d->dev, "format %08x, %dbpp\n", mdsi->format, in mcde_dsi_host_attach()
184 dev_info(d->dev, "mode flags: %08lx\n", mdsi->mode_flags); in mcde_dsi_host_attach()
186 d->mdsi = mdsi; in mcde_dsi_host_attach()
187 if (d->mcde) in mcde_dsi_host_attach()
188 mcde_dsi_attach_to_mcde(d); in mcde_dsi_host_attach()
196 struct mcde_dsi *d = host_to_mcde_dsi(host); in mcde_dsi_host_detach() local
198 d->mdsi = NULL; in mcde_dsi_host_detach()
199 if (d->mcde) in mcde_dsi_host_detach()
200 d->mcde->mdsi = NULL; in mcde_dsi_host_detach()
211 static int mcde_dsi_execute_transfer(struct mcde_dsi *d, in mcde_dsi_execute_transfer() argument
222 writel(~0, d->regs + DSI_DIRECT_CMD_STS_CLR); in mcde_dsi_execute_transfer()
223 writel(~0, d->regs + DSI_CMD_MODE_STS_CLR); in mcde_dsi_execute_transfer()
225 writel(1, d->regs + DSI_DIRECT_CMD_SEND); in mcde_dsi_execute_transfer()
230 while (!(readl(d->regs + DSI_DIRECT_CMD_STS) & in mcde_dsi_execute_transfer()
236 dev_err(d->dev, "DSI read timeout!\n"); in mcde_dsi_execute_transfer()
242 while (!(readl(d->regs + DSI_DIRECT_CMD_STS) & in mcde_dsi_execute_transfer()
249 dev_err(d->dev, "DSI write timeout!\n"); in mcde_dsi_execute_transfer()
254 val = readl(d->regs + DSI_DIRECT_CMD_STS); in mcde_dsi_execute_transfer()
256 dev_err(d->dev, "read completed with error\n"); in mcde_dsi_execute_transfer()
257 writel(1, d->regs + DSI_DIRECT_CMD_RD_INIT); in mcde_dsi_execute_transfer()
262 dev_err(d->dev, "error during transmission: %04x\n", in mcde_dsi_execute_transfer()
276 rdsz = readl(d->regs + DSI_DIRECT_CMD_RD_PROPERTY); in mcde_dsi_execute_transfer()
278 rddat = readl(d->regs + DSI_DIRECT_CMD_RDDAT); in mcde_dsi_execute_transfer()
280 dev_err(d->dev, "read error, requested %zd got %d\n", in mcde_dsi_execute_transfer()
297 struct mcde_dsi *d = host_to_mcde_dsi(host); in mcde_dsi_host_transfer() local
307 dev_err(d->dev, in mcde_dsi_host_transfer()
312 dev_err(d->dev, in mcde_dsi_host_transfer()
317 dev_dbg(d->dev, in mcde_dsi_host_transfer()
339 writel(val, d->regs + DSI_DIRECT_CMD_MAIN_SETTINGS); in mcde_dsi_host_transfer()
347 writel(val, d->regs + DSI_DIRECT_CMD_WRDAT0); in mcde_dsi_host_transfer()
352 writel(val, d->regs + DSI_DIRECT_CMD_WRDAT1); in mcde_dsi_host_transfer()
358 writel(val, d->regs + DSI_DIRECT_CMD_WRDAT2); in mcde_dsi_host_transfer()
364 writel(val, d->regs + DSI_DIRECT_CMD_WRDAT3); in mcde_dsi_host_transfer()
368 ret = mcde_dsi_execute_transfer(d, msg); in mcde_dsi_host_transfer()
374 dev_err(d->dev, "gave up after %d retries\n", retries); in mcde_dsi_host_transfer()
377 writel(~0, d->regs + DSI_DIRECT_CMD_STS_CLR); in mcde_dsi_host_transfer()
378 writel(~0, d->regs + DSI_CMD_MODE_STS_CLR); in mcde_dsi_host_transfer()
392 struct mcde_dsi *d; in mcde_dsi_te_request() local
395 d = host_to_mcde_dsi(mdsi->host); in mcde_dsi_te_request()
404 writel(val, d->regs + DSI_DIRECT_CMD_MAIN_SETTINGS); in mcde_dsi_te_request()
409 d->regs + DSI_DIRECT_CMD_STS_CLR); in mcde_dsi_te_request()
410 val = readl(d->regs + DSI_DIRECT_CMD_STS_CTL); in mcde_dsi_te_request()
413 writel(val, d->regs + DSI_DIRECT_CMD_STS_CTL); in mcde_dsi_te_request()
418 d->regs + DSI_CMD_MODE_STS_CLR); in mcde_dsi_te_request()
419 val = readl(d->regs + DSI_CMD_MODE_STS_CTL); in mcde_dsi_te_request()
422 writel(val, d->regs + DSI_CMD_MODE_STS_CTL); in mcde_dsi_te_request()
425 writel(1, d->regs + DSI_DIRECT_CMD_SEND); in mcde_dsi_te_request()
428 static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, in mcde_dsi_setup_video_mode() argument
432 u8 cpp = mipi_dsi_pixel_format_to_bpp(d->mdsi->format) / 8; in mcde_dsi_setup_video_mode()
442 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) in mcde_dsi_setup_video_mode()
444 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { in mcde_dsi_setup_video_mode()
449 switch (d->mdsi->format) { in mcde_dsi_setup_video_mode()
471 dev_err(d->dev, "unknown pixel mode\n"); in mcde_dsi_setup_video_mode()
494 writel(val, d->regs + DSI_VID_MAIN_CTL); in mcde_dsi_setup_video_mode()
507 writel(val, d->regs + DSI_VID_VSIZE); in mcde_dsi_setup_video_mode()
522 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { in mcde_dsi_setup_video_mode()
547 dev_info(d->dev, "hfp negative, set to 0\n"); in mcde_dsi_setup_video_mode()
551 dev_info(d->dev, "hbp negative, set to 0\n"); in mcde_dsi_setup_video_mode()
555 dev_info(d->dev, "hsa negative, set to 0\n"); in mcde_dsi_setup_video_mode()
558 dev_dbg(d->dev, "hfp: %u, hbp: %u, hsa: %u bytes\n", in mcde_dsi_setup_video_mode()
567 writel(val, d->regs + DSI_VID_HSIZE1); in mcde_dsi_setup_video_mode()
571 writel(val, d->regs + DSI_VID_HSIZE2); in mcde_dsi_setup_video_mode()
572 dev_dbg(d->dev, "RGB length, visible area on a line: %u bytes\n", val); in mcde_dsi_setup_video_mode()
581 dev_dbg(d->dev, "picoseconds between two pixels: %llu\n", in mcde_dsi_setup_video_mode()
600 dev_dbg(d->dev, "picoseconds per line: %llu\n", bpl); in mcde_dsi_setup_video_mode()
602 bpl *= (d->mdsi->hs_rate / 8); in mcde_dsi_setup_video_mode()
607 bpl *= d->mdsi->lanes; in mcde_dsi_setup_video_mode()
608 dev_dbg(d->dev, in mcde_dsi_setup_video_mode()
610 bpl, drm_mode_vrefresh(mode), d->mdsi->hs_rate); in mcde_dsi_setup_video_mode()
616 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { in mcde_dsi_setup_video_mode()
618 writel(0, d->regs + DSI_VID_BLKSIZE1); in mcde_dsi_setup_video_mode()
627 writel(val, d->regs + DSI_VID_BLKSIZE2); in mcde_dsi_setup_video_mode()
630 writel(0, d->regs + DSI_VID_BLKSIZE2); in mcde_dsi_setup_video_mode()
634 dev_err(d->dev, "blkline_pck too big %d bytes\n", in mcde_dsi_setup_video_mode()
638 writel(val, d->regs + DSI_VID_BLKSIZE1); in mcde_dsi_setup_video_mode()
652 if (d->mdsi->lanes == 2 && (hsa & 0x01) && (hfp & 0x01) in mcde_dsi_setup_video_mode()
653 && (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)) in mcde_dsi_setup_video_mode()
655 line_duration = DIV_ROUND_CLOSEST(line_duration, d->mdsi->lanes); in mcde_dsi_setup_video_mode()
656 dev_dbg(d->dev, "line duration %u bytes\n", line_duration); in mcde_dsi_setup_video_mode()
665 writel(val, d->regs + DSI_VID_DPHY_TIME); in mcde_dsi_setup_video_mode()
671 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { in mcde_dsi_setup_video_mode()
683 dev_err(d->dev, "video block does not fit on line!\n"); in mcde_dsi_setup_video_mode()
684 dev_err(d->dev, in mcde_dsi_setup_video_mode()
687 dev_err(d->dev, in mcde_dsi_setup_video_mode()
690 dev_err(d->dev, in mcde_dsi_setup_video_mode()
694 dev_dbg(d->dev, "BLKEOL packet: %d bytes\n", blkeol_pck); in mcde_dsi_setup_video_mode()
696 val = readl(d->regs + DSI_VID_BLKSIZE1); in mcde_dsi_setup_video_mode()
699 writel(val, d->regs + DSI_VID_BLKSIZE1); in mcde_dsi_setup_video_mode()
704 writel(val, d->regs + DSI_VID_VCA_SETTING2); in mcde_dsi_setup_video_mode()
722 d->mdsi->lanes); in mcde_dsi_setup_video_mode()
723 dev_dbg(d->dev, "BLKEOL duration: %d clock cycles\n", in mcde_dsi_setup_video_mode()
726 val = readl(d->regs + DSI_VID_PCK_TIME); in mcde_dsi_setup_video_mode()
730 writel(val, d->regs + DSI_VID_PCK_TIME); in mcde_dsi_setup_video_mode()
733 val = readl(d->regs + DSI_VID_VCA_SETTING1); in mcde_dsi_setup_video_mode()
737 writel(val, d->regs + DSI_VID_VCA_SETTING1); in mcde_dsi_setup_video_mode()
741 val = readl(d->regs + DSI_VID_VCA_SETTING2); in mcde_dsi_setup_video_mode()
745 writel(val, d->regs + DSI_VID_VCA_SETTING2); in mcde_dsi_setup_video_mode()
746 dev_dbg(d->dev, "blkline pck: %d bytes\n", blkline_pck - 6); in mcde_dsi_setup_video_mode()
749 static void mcde_dsi_start(struct mcde_dsi *d) in mcde_dsi_start() argument
756 writel(0, d->regs + DSI_MCTL_INTEGRATION_MODE); in mcde_dsi_start()
763 if (!(d->mdsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) in mcde_dsi_start()
765 writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_start()
769 writel(val, d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_start()
776 hs_freq = clk_get_rate(d->hs_clk); in mcde_dsi_start()
779 dev_dbg(d->dev, "UI value: %d\n", val); in mcde_dsi_start()
782 writel(val, d->regs + DSI_MCTL_DPHY_STATIC); in mcde_dsi_start()
791 if (d->mdsi->lanes == 2) in mcde_dsi_start()
793 if (!(d->mdsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) in mcde_dsi_start()
798 writel(val, d->regs + DSI_MCTL_MAIN_PHY_CTL); in mcde_dsi_start()
802 writel(val, d->regs + DSI_MCTL_ULPOUT_TIME); in mcde_dsi_start()
805 d->regs + DSI_DPHY_LANES_TRIM); in mcde_dsi_start()
811 writel(val, d->regs + DSI_MCTL_DPHY_TIMEOUT); in mcde_dsi_start()
817 if (d->mdsi->lanes == 2) in mcde_dsi_start()
819 writel(val, d->regs + DSI_MCTL_MAIN_EN); in mcde_dsi_start()
826 if (d->mdsi->lanes == 2) in mcde_dsi_start()
828 while ((readl(d->regs + DSI_MCTL_MAIN_STS) & val) != val) { in mcde_dsi_start()
832 dev_warn(d->dev, "DSI lanes did not start up\n"); in mcde_dsi_start()
840 val = readl(d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_start()
845 if (d->mdsi->mode_flags & MIPI_DSI_MODE_LPM) in mcde_dsi_start()
848 writel(val, d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_start()
852 dev_info(d->dev, "DSI link enabled\n"); in mcde_dsi_start()
861 struct mcde_dsi *d = bridge_to_mcde_dsi(bridge); in mcde_dsi_enable() local
867 if (d->mdsi->lp_rate) in mcde_dsi_enable()
868 lp_freq = d->mdsi->lp_rate; in mcde_dsi_enable()
871 if (d->mdsi->hs_rate) in mcde_dsi_enable()
872 hs_freq = d->mdsi->hs_rate; in mcde_dsi_enable()
877 d->lp_freq = clk_round_rate(d->lp_clk, lp_freq); in mcde_dsi_enable()
878 ret = clk_set_rate(d->lp_clk, d->lp_freq); in mcde_dsi_enable()
880 dev_err(d->dev, "failed to set LP clock rate %lu Hz\n", in mcde_dsi_enable()
881 d->lp_freq); in mcde_dsi_enable()
883 d->hs_freq = clk_round_rate(d->hs_clk, hs_freq); in mcde_dsi_enable()
884 ret = clk_set_rate(d->hs_clk, d->hs_freq); in mcde_dsi_enable()
886 dev_err(d->dev, "failed to set HS clock rate %lu Hz\n", in mcde_dsi_enable()
887 d->hs_freq); in mcde_dsi_enable()
890 ret = clk_prepare_enable(d->lp_clk); in mcde_dsi_enable()
892 dev_err(d->dev, "failed to enable LP clock\n"); in mcde_dsi_enable()
894 dev_info(d->dev, "DSI LP clock rate %lu Hz\n", in mcde_dsi_enable()
895 d->lp_freq); in mcde_dsi_enable()
896 ret = clk_prepare_enable(d->hs_clk); in mcde_dsi_enable()
898 dev_err(d->dev, "failed to enable HS clock\n"); in mcde_dsi_enable()
900 dev_info(d->dev, "DSI HS clock rate %lu Hz\n", in mcde_dsi_enable()
901 d->hs_freq); in mcde_dsi_enable()
905 regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, in mcde_dsi_enable()
911 regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, in mcde_dsi_enable()
916 mcde_dsi_start(d); in mcde_dsi_enable()
918 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) { in mcde_dsi_enable()
920 mcde_dsi_setup_video_mode(d, d->mode); in mcde_dsi_enable()
923 val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_enable()
925 writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_enable()
928 val = readl(d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_enable()
930 writel(val, d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_enable()
933 val = readl(d->regs + DSI_VID_MODE_STS_CTL); in mcde_dsi_enable()
936 writel(val, d->regs + DSI_VID_MODE_STS_CTL); in mcde_dsi_enable()
939 val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_enable()
941 writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_enable()
944 val = readl(d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_enable()
949 if (d->mdsi->mode_flags & MIPI_DSI_MODE_LPM) in mcde_dsi_enable()
952 writel(val, d->regs + DSI_CMD_MODE_CTL); in mcde_dsi_enable()
955 dev_info(d->dev, "enabled MCDE DSI master\n"); in mcde_dsi_enable()
962 struct mcde_dsi *d = bridge_to_mcde_dsi(bridge); in mcde_dsi_bridge_mode_set() local
964 if (!d->mdsi) { in mcde_dsi_bridge_mode_set()
965 dev_err(d->dev, "no DSI device attached to encoder!\n"); in mcde_dsi_bridge_mode_set()
969 d->mode = mode; in mcde_dsi_bridge_mode_set()
971 dev_info(d->dev, "set DSI master to %dx%d %u Hz %s mode\n", in mcde_dsi_bridge_mode_set()
973 (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) ? "VIDEO" : "CMD" in mcde_dsi_bridge_mode_set()
977 static void mcde_dsi_wait_for_command_mode_stop(struct mcde_dsi *d) in mcde_dsi_wait_for_command_mode_stop() argument
988 while ((readl(d->regs + DSI_CMD_MODE_STS) & val) == val) { in mcde_dsi_wait_for_command_mode_stop()
992 dev_warn(d->dev, in mcde_dsi_wait_for_command_mode_stop()
999 static void mcde_dsi_wait_for_video_mode_stop(struct mcde_dsi *d) in mcde_dsi_wait_for_video_mode_stop() argument
1007 while ((readl(d->regs + DSI_VID_MODE_STS) & val) == val) { in mcde_dsi_wait_for_video_mode_stop()
1011 dev_warn(d->dev, in mcde_dsi_wait_for_video_mode_stop()
1024 struct mcde_dsi *d = bridge_to_mcde_dsi(bridge); in mcde_dsi_disable() local
1027 if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) { in mcde_dsi_disable()
1029 val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_disable()
1031 writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL); in mcde_dsi_disable()
1032 mcde_dsi_wait_for_video_mode_stop(d); in mcde_dsi_disable()
1035 mcde_dsi_wait_for_command_mode_stop(d); in mcde_dsi_disable()
1045 writel(0, d->regs + DSI_VID_MODE_STS_CTL); in mcde_dsi_disable()
1046 clk_disable_unprepare(d->hs_clk); in mcde_dsi_disable()
1047 clk_disable_unprepare(d->lp_clk); in mcde_dsi_disable()
1053 struct mcde_dsi *d = bridge_to_mcde_dsi(bridge); in mcde_dsi_bridge_attach() local
1057 dev_err(d->dev, "we need atomic updates\n"); in mcde_dsi_bridge_attach()
1062 return drm_bridge_attach(bridge->encoder, d->bridge_out, bridge, flags); in mcde_dsi_bridge_attach()
1075 struct mcde_dsi *d = dev_get_drvdata(dev); in mcde_dsi_bind() local
1082 d->unused = true; in mcde_dsi_bind()
1085 d->mcde = mcde; in mcde_dsi_bind()
1087 if (d->mdsi) in mcde_dsi_bind()
1088 mcde_dsi_attach_to_mcde(d); in mcde_dsi_bind()
1091 d->hs_clk = devm_clk_get(dev, "hs"); in mcde_dsi_bind()
1092 if (IS_ERR(d->hs_clk)) { in mcde_dsi_bind()
1094 return PTR_ERR(d->hs_clk); in mcde_dsi_bind()
1097 d->lp_clk = devm_clk_get(dev, "lp"); in mcde_dsi_bind()
1098 if (IS_ERR(d->lp_clk)) { in mcde_dsi_bind()
1100 return PTR_ERR(d->lp_clk); in mcde_dsi_bind()
1127 d->panel = panel; in mcde_dsi_bind()
1137 d->bridge_out = bridge; in mcde_dsi_bind()
1140 d->bridge.funcs = &mcde_dsi_bridge_funcs; in mcde_dsi_bind()
1141 d->bridge.of_node = dev->of_node; in mcde_dsi_bind()
1142 drm_bridge_add(&d->bridge); in mcde_dsi_bind()
1145 mcde->bridge = &d->bridge; in mcde_dsi_bind()
1155 struct mcde_dsi *d = dev_get_drvdata(dev); in mcde_dsi_unbind() local
1157 if (d->panel) in mcde_dsi_unbind()
1158 drm_panel_bridge_remove(d->bridge_out); in mcde_dsi_unbind()
1159 regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, in mcde_dsi_unbind()
1171 struct mcde_dsi *d; in mcde_dsi_probe() local
1176 d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL); in mcde_dsi_probe()
1177 if (!d) in mcde_dsi_probe()
1179 d->dev = dev; in mcde_dsi_probe()
1180 platform_set_drvdata(pdev, d); in mcde_dsi_probe()
1183 d->prcmu = in mcde_dsi_probe()
1185 if (IS_ERR(d->prcmu)) { in mcde_dsi_probe()
1187 return PTR_ERR(d->prcmu); in mcde_dsi_probe()
1190 d->regs = devm_platform_ioremap_resource(pdev, 0); in mcde_dsi_probe()
1191 if (IS_ERR(d->regs)) in mcde_dsi_probe()
1192 return PTR_ERR(d->regs); in mcde_dsi_probe()
1194 dsi_id = readl(d->regs + DSI_ID_REG); in mcde_dsi_probe()
1197 host = &d->dsi_host; in mcde_dsi_probe()
1207 platform_set_drvdata(pdev, d); in mcde_dsi_probe()
1213 struct mcde_dsi *d = platform_get_drvdata(pdev); in mcde_dsi_remove() local
1216 mipi_dsi_host_unregister(&d->dsi_host); in mcde_dsi_remove()