Lines Matching refs:vgpu_vreg_t
66 if (!(vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_EDP)) & TRANSCONF_ENABLE)) in edp_pipe_is_enabled()
82 if (vgpu_vreg_t(vgpu, TRANSCONF(pipe)) & TRANSCONF_ENABLE) in pipe_is_enabled()
184 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= in emulate_monitor_status_change()
190 vgpu_vreg_t(vgpu, TRANSCONF(pipe)) &= in emulate_monitor_status_change()
192 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE; in emulate_monitor_status_change()
193 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
194 vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE_MASK; in emulate_monitor_status_change()
195 vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE; in emulate_monitor_status_change()
199 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(trans)) &= in emulate_monitor_status_change()
203 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &= in emulate_monitor_status_change()
208 vgpu_vreg_t(vgpu, BXT_PHY_CTL(port)) &= in emulate_monitor_status_change()
210 vgpu_vreg_t(vgpu, BXT_PHY_CTL(port)) |= in emulate_monitor_status_change()
214 vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(port)) &= in emulate_monitor_status_change()
219 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) &= in emulate_monitor_status_change()
222 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) |= DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
224 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= in emulate_monitor_status_change()
226 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= in emulate_monitor_status_change()
228 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= in emulate_monitor_status_change()
231 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= ~BXT_DDI_HPD_INVERT_MASK; in emulate_monitor_status_change()
232 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~BXT_DE_PORT_HOTPLUG_MASK; in emulate_monitor_status_change()
234 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= ~(BIT(0) | BIT(1)); in emulate_monitor_status_change()
235 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &= in emulate_monitor_status_change()
237 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &= in emulate_monitor_status_change()
239 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= ~BIT(30); in emulate_monitor_status_change()
240 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &= ~BIT(30); in emulate_monitor_status_change()
242 vgpu_vreg_t(vgpu, SFUSE_STRAP) &= ~SFUSE_STRAP_DDIB_DETECTED; in emulate_monitor_status_change()
243 vgpu_vreg_t(vgpu, SFUSE_STRAP) &= ~SFUSE_STRAP_DDIC_DETECTED; in emulate_monitor_status_change()
251 vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_A)) |= TRANSCONF_ENABLE; in emulate_monitor_status_change()
252 vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_A)) |= TRANSCONF_STATE_ENABLE; in emulate_monitor_status_change()
260 vgpu_vreg_t(vgpu, PIPE_DATA_M1(TRANSCODER_A)) = TU_SIZE(64); in emulate_monitor_status_change()
261 vgpu_vreg_t(vgpu, PIPE_DATA_M1(TRANSCODER_A)) |= 0x5b425e; in emulate_monitor_status_change()
262 vgpu_vreg_t(vgpu, PIPE_DATA_N1(TRANSCODER_A)) = 0x800000; in emulate_monitor_status_change()
263 vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e; in emulate_monitor_status_change()
264 vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000; in emulate_monitor_status_change()
268 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(1); in emulate_monitor_status_change()
269 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) |= in emulate_monitor_status_change()
271 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) |= in emulate_monitor_status_change()
273 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |= in emulate_monitor_status_change()
275 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &= in emulate_monitor_status_change()
278 vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_A)) |= in emulate_monitor_status_change()
282 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= in emulate_monitor_status_change()
284 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &= in emulate_monitor_status_change()
286 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_EDP)) |= in emulate_monitor_status_change()
289 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in emulate_monitor_status_change()
291 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in emulate_monitor_status_change()
296 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIB_DETECTED; in emulate_monitor_status_change()
297 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(0); in emulate_monitor_status_change()
298 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |= in emulate_monitor_status_change()
300 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |= in emulate_monitor_status_change()
302 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) |= in emulate_monitor_status_change()
304 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &= in emulate_monitor_status_change()
307 vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_B)) |= in emulate_monitor_status_change()
311 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= in emulate_monitor_status_change()
313 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= in emulate_monitor_status_change()
315 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |= in emulate_monitor_status_change()
319 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in emulate_monitor_status_change()
321 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in emulate_monitor_status_change()
326 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIC_DETECTED; in emulate_monitor_status_change()
327 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(0); in emulate_monitor_status_change()
328 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |= in emulate_monitor_status_change()
330 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |= in emulate_monitor_status_change()
332 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) |= in emulate_monitor_status_change()
334 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) &= in emulate_monitor_status_change()
337 vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_C)) |= in emulate_monitor_status_change()
341 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= in emulate_monitor_status_change()
343 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= in emulate_monitor_status_change()
345 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |= in emulate_monitor_status_change()
349 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in emulate_monitor_status_change()
351 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in emulate_monitor_status_change()
358 vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTB_HOTPLUG_CPT | in emulate_monitor_status_change()
366 vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTA_HOTPLUG_SPT | in emulate_monitor_status_change()
368 vgpu_vreg_t(vgpu, SKL_FUSE_STATUS) |= in emulate_monitor_status_change()
381 vgpu_vreg_t(vgpu, DPLL_CTRL1) = in emulate_monitor_status_change()
383 vgpu_vreg_t(vgpu, DPLL_CTRL1) |= in emulate_monitor_status_change()
385 vgpu_vreg_t(vgpu, LCPLL1_CTL) = in emulate_monitor_status_change()
387 vgpu_vreg_t(vgpu, DPLL_STATUS) = DPLL_LOCK(DPLL_ID_SKL_DPLL0); in emulate_monitor_status_change()
394 vgpu_vreg_t(vgpu, PIPE_DATA_M1(TRANSCODER_A)) = TU_SIZE(64); in emulate_monitor_status_change()
395 vgpu_vreg_t(vgpu, PIPE_DATA_M1(TRANSCODER_A)) |= 0x5b425e; in emulate_monitor_status_change()
396 vgpu_vreg_t(vgpu, PIPE_DATA_N1(TRANSCODER_A)) = 0x800000; in emulate_monitor_status_change()
397 vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e; in emulate_monitor_status_change()
398 vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000; in emulate_monitor_status_change()
402 vgpu_vreg_t(vgpu, DPLL_CTRL2) &= in emulate_monitor_status_change()
404 vgpu_vreg_t(vgpu, DPLL_CTRL2) |= in emulate_monitor_status_change()
406 vgpu_vreg_t(vgpu, DPLL_CTRL2) |= in emulate_monitor_status_change()
408 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIB_DETECTED; in emulate_monitor_status_change()
409 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &= in emulate_monitor_status_change()
412 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |= in emulate_monitor_status_change()
417 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) &= in emulate_monitor_status_change()
419 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) |= in emulate_monitor_status_change()
422 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change()
423 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= ~DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
424 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTB_HOTPLUG_CPT; in emulate_monitor_status_change()
428 vgpu_vreg_t(vgpu, DPLL_CTRL2) &= in emulate_monitor_status_change()
430 vgpu_vreg_t(vgpu, DPLL_CTRL2) |= in emulate_monitor_status_change()
432 vgpu_vreg_t(vgpu, DPLL_CTRL2) |= in emulate_monitor_status_change()
434 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTC_HOTPLUG_CPT; in emulate_monitor_status_change()
435 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &= in emulate_monitor_status_change()
438 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |= in emulate_monitor_status_change()
443 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) &= in emulate_monitor_status_change()
445 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) |= in emulate_monitor_status_change()
448 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change()
449 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= ~DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
450 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIC_DETECTED; in emulate_monitor_status_change()
454 vgpu_vreg_t(vgpu, DPLL_CTRL2) &= in emulate_monitor_status_change()
456 vgpu_vreg_t(vgpu, DPLL_CTRL2) |= in emulate_monitor_status_change()
458 vgpu_vreg_t(vgpu, DPLL_CTRL2) |= in emulate_monitor_status_change()
460 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTD_HOTPLUG_CPT; in emulate_monitor_status_change()
461 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &= in emulate_monitor_status_change()
464 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |= in emulate_monitor_status_change()
469 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &= in emulate_monitor_status_change()
471 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |= in emulate_monitor_status_change()
474 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change()
475 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
476 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDID_DETECTED; in emulate_monitor_status_change()
484 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTE_HOTPLUG_SPT; in emulate_monitor_status_change()
489 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in emulate_monitor_status_change()
492 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTA_HOTPLUG_SPT; in emulate_monitor_status_change()
494 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED; in emulate_monitor_status_change()
499 vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK; in emulate_monitor_status_change()
503 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE; in emulate_monitor_status_change()
504 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
505 vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE_MASK; in emulate_monitor_status_change()
506 vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE; in emulate_monitor_status_change()
509 vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_A)) |= TRANSCONF_ENABLE; in emulate_monitor_status_change()
646 vgpu_vreg_t(vgpu, PIPE_FRMCOUNT_G4X(pipe))++; in emulate_vblank_on_pipe()
679 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= in intel_vgpu_emulate_hotplug()
681 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTD_HOTPLUG_CPT; in intel_vgpu_emulate_hotplug()
683 vgpu_vreg_t(vgpu, SFUSE_STRAP) &= in intel_vgpu_emulate_hotplug()
685 vgpu_vreg_t(vgpu, SDEISR) &= ~SDE_PORTD_HOTPLUG_CPT; in intel_vgpu_emulate_hotplug()
687 vgpu_vreg_t(vgpu, SDEIIR) |= SDE_PORTD_HOTPLUG_CPT; in intel_vgpu_emulate_hotplug()
688 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in intel_vgpu_emulate_hotplug()
694 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in intel_vgpu_emulate_hotplug()
697 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= in intel_vgpu_emulate_hotplug()
700 vgpu_vreg_t(vgpu, GEN8_DE_PORT_IIR) |= in intel_vgpu_emulate_hotplug()
702 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= in intel_vgpu_emulate_hotplug()
704 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in intel_vgpu_emulate_hotplug()
710 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in intel_vgpu_emulate_hotplug()
712 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= in intel_vgpu_emulate_hotplug()
715 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= in intel_vgpu_emulate_hotplug()
717 vgpu_vreg_t(vgpu, SFUSE_STRAP) &= in intel_vgpu_emulate_hotplug()
720 vgpu_vreg_t(vgpu, GEN8_DE_PORT_IIR) |= in intel_vgpu_emulate_hotplug()
722 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= in intel_vgpu_emulate_hotplug()
724 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in intel_vgpu_emulate_hotplug()
730 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |= in intel_vgpu_emulate_hotplug()
732 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= in intel_vgpu_emulate_hotplug()
735 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= in intel_vgpu_emulate_hotplug()
737 vgpu_vreg_t(vgpu, SFUSE_STRAP) &= in intel_vgpu_emulate_hotplug()
740 vgpu_vreg_t(vgpu, GEN8_DE_PORT_IIR) |= in intel_vgpu_emulate_hotplug()
742 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= in intel_vgpu_emulate_hotplug()
744 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |= in intel_vgpu_emulate_hotplug()