64 	struct guc_mmio_reg regset[];  member
103 	return offsetof(struct __guc_ads_blob, regset);  in guc_ads_regset_offset()
255 __mmio_reg_add(struct temp_regset *regset, struct guc_mmio_reg *reg)  in __mmio_reg_add()  argument
257 	u32 pos = regset->storage_used;  in __mmio_reg_add()
260 	if (pos >= regset->storage_max) {  in __mmio_reg_add()
262 		struct guc_mmio_reg *r = krealloc(regset->storage,  in __mmio_reg_add()
270 		regset->registers = r + (regset->registers - regset->storage);  in __mmio_reg_add()
271 		regset->storage = r;  in __mmio_reg_add()
272 		regset->storage_max = size / sizeof(*slot);  in __mmio_reg_add()
275 	slot = &regset->storage[pos];  in __mmio_reg_add()
276 	regset->storage_used++;  in __mmio_reg_add()
283 					  struct temp_regset *regset,  in guc_mmio_reg_add()  argument
286 	u32 count = regset->storage_used - (regset->registers - regset->storage);  in guc_mmio_reg_add()
299 	if (bsearch(&entry, regset->registers, count,  in guc_mmio_reg_add()
303 	slot = __mmio_reg_add(regset, &entry);  in guc_mmio_reg_add()
307 	while (slot-- > regset->registers) {  in guc_mmio_reg_add()
318 #define GUC_MMIO_REG_ADD(gt, regset, reg, masked) \  argument
320 			 regset, \
331 					 struct temp_regset *regset,  in guc_mcr_reg_add()  argument
347 	return guc_mmio_reg_add(gt, regset, i915_mmio_reg_offset(reg), flags);  in guc_mcr_reg_add()
350 #define GUC_MCR_REG_ADD(gt, regset, reg, masked) \  argument
352 			 regset, \
356 static int guc_mmio_regset_init(struct temp_regset *regset,  in guc_mmio_regset_init()  argument
370 	regset->registers = regset->storage + regset->storage_used;  in guc_mmio_regset_init()
372 	ret |= GUC_MMIO_REG_ADD(gt, regset, RING_MODE_GEN7(base), true);  in guc_mmio_regset_init()
373 	ret |= GUC_MMIO_REG_ADD(gt, regset, RING_HWS_PGA(base), false);  in guc_mmio_regset_init()
374 	ret |= GUC_MMIO_REG_ADD(gt, regset, RING_IMR(base), false);  in guc_mmio_regset_init()
378 		ret |= GUC_MMIO_REG_ADD(gt, regset, GEN12_RCU_MODE, true);  in guc_mmio_regset_init()
381 		ret |= GUC_MMIO_REG_ADD(gt, regset, wa->reg, wa->masked_reg);  in guc_mmio_regset_init()
385 		ret |= GUC_MMIO_REG_ADD(gt, regset,  in guc_mmio_regset_init()
392 			ret |= GUC_MCR_REG_ADD(gt, regset, XEHP_LNCFCMOCS(i), false);  in guc_mmio_regset_init()
394 			ret |= GUC_MMIO_REG_ADD(gt, regset, GEN9_LNCFCMOCS(i), false);  in guc_mmio_regset_init()
397 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL0, false);  in guc_mmio_regset_init()
398 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL1, false);  in guc_mmio_regset_init()
399 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL2, false);  in guc_mmio_regset_init()
400 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL3, false);  in guc_mmio_regset_init()
401 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL4, false);  in guc_mmio_regset_init()
402 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL5, false);  in guc_mmio_regset_init()
403 		ret |= GUC_MMIO_REG_ADD(gt, regset, EU_PERF_CNTL6, false);  in guc_mmio_regset_init()