590 static void intel_crtc_dbuf_weights(const struct intel_dbuf_state *dbuf_state,  in intel_crtc_dbuf_weights()  argument
597 		to_i915(dbuf_state->base.state->base.dev);  in intel_crtc_dbuf_weights()
605 		int weight = dbuf_state->weight[pipe];  in intel_crtc_dbuf_weights()
614 		if (dbuf_state->slices[pipe] != dbuf_state->slices[for_pipe])  in intel_crtc_dbuf_weights()
1494 	const struct intel_dbuf_state *dbuf_state =  in skl_crtc_allocate_plane_ddb()  local
1496 	const struct skl_ddb_entry *alloc = &dbuf_state->ddb[crtc->pipe];  in skl_crtc_allocate_plane_ddb()
1497 	int num_active = hweight8(dbuf_state->active_pipes);  in skl_crtc_allocate_plane_ddb()
2540 static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)  in intel_dbuf_enabled_slices()  argument
2542 	struct drm_i915_private *i915 = to_i915(dbuf_state->base.state->base.dev);  in intel_dbuf_enabled_slices()
2553 		enabled_slices |= dbuf_state->slices[pipe];  in intel_dbuf_enabled_slices()
2995 	struct intel_dbuf_state *dbuf_state =  in skl_wm_get_hw_state()  local
3000 		dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;  in skl_wm_get_hw_state()
3016 		memset(&dbuf_state->ddb[pipe], 0, sizeof(dbuf_state->ddb[pipe]));  in skl_wm_get_hw_state()
3030 			skl_ddb_entry_union(&dbuf_state->ddb[pipe], ddb);  in skl_wm_get_hw_state()
3031 			skl_ddb_entry_union(&dbuf_state->ddb[pipe], ddb_y);  in skl_wm_get_hw_state()
3034 		dbuf_state->weight[pipe] = intel_crtc_ddb_weight(crtc_state);  in skl_wm_get_hw_state()
3040 		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,  in skl_wm_get_hw_state()
3041 						 dbuf_state->joined_mbus);  in skl_wm_get_hw_state()
3043 		crtc_state->wm.skl.ddb.start = mbus_offset + dbuf_state->ddb[pipe].start;  in skl_wm_get_hw_state()
3044 		crtc_state->wm.skl.ddb.end = mbus_offset + dbuf_state->ddb[pipe].end;  in skl_wm_get_hw_state()
3047 		dbuf_state->slices[pipe] =  in skl_wm_get_hw_state()
3053 			    dbuf_state->slices[pipe], dbuf_state->ddb[pipe].start,  in skl_wm_get_hw_state()
3054 			    dbuf_state->ddb[pipe].end, dbuf_state->active_pipes,  in skl_wm_get_hw_state()
3055 			    str_yes_no(dbuf_state->joined_mbus));  in skl_wm_get_hw_state()
3058 	dbuf_state->enabled_slices = i915->display.dbuf.enabled_slices;  in skl_wm_get_hw_state()
3063 	const struct intel_dbuf_state *dbuf_state =  in skl_dbuf_is_misconfigured()  local
3080 		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,  in skl_dbuf_is_misconfigured()
3081 						 dbuf_state->joined_mbus);  in skl_dbuf_is_misconfigured()
3082 		if (dbuf_state->slices[crtc->pipe] & ~slices)  in skl_dbuf_is_misconfigured()
3426 	struct intel_dbuf_state *dbuf_state;  in intel_dbuf_duplicate_state()  local
3428 	dbuf_state = kmemdup(obj->state, sizeof(*dbuf_state), GFP_KERNEL);  in intel_dbuf_duplicate_state()
3429 	if (!dbuf_state)  in intel_dbuf_duplicate_state()
3432 	return &dbuf_state->base;  in intel_dbuf_duplicate_state()
3450 	struct intel_global_state *dbuf_state;  in intel_atomic_get_dbuf_state()  local
3452 	dbuf_state = intel_atomic_get_global_obj_state(state, &i915->display.dbuf.obj);  in intel_atomic_get_dbuf_state()
3453 	if (IS_ERR(dbuf_state))  in intel_atomic_get_dbuf_state()
3454 		return ERR_CAST(dbuf_state);  in intel_atomic_get_dbuf_state()
3456 	return to_intel_dbuf_state(dbuf_state);  in intel_atomic_get_dbuf_state()
3461 	struct intel_dbuf_state *dbuf_state;  in intel_dbuf_init()  local
3463 	dbuf_state = kzalloc(sizeof(*dbuf_state), GFP_KERNEL);  in intel_dbuf_init()
3464 	if (!dbuf_state)  in intel_dbuf_init()
3468 				     &dbuf_state->base, &intel_dbuf_funcs);  in intel_dbuf_init()
3482 	const struct intel_dbuf_state *dbuf_state =  in update_mbus_pre_enable()  local
3492 	if (dbuf_state->joined_mbus) {  in update_mbus_pre_enable()