Lines Matching refs:pp_div
476 i915_reg_t pp_div; member
502 regs->pp_div = INVALID_MMIO_REG; in intel_pps_get_registers()
504 regs->pp_div = PP_DIVISOR(pps_idx); in intel_pps_get_registers()
1291 if (i915_mmio_reg_valid(regs.pp_div)) { in intel_pps_readout_hw_state()
1292 u32 pp_div; in intel_pps_readout_hw_state() local
1294 pp_div = intel_de_read(dev_priv, regs.pp_div); in intel_pps_readout_hw_state()
1296 seq->t11_t12 = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, pp_div) * 1000; in intel_pps_readout_hw_state()
1542 if (i915_mmio_reg_valid(regs.pp_div)) in pps_init_registers()
1543 intel_de_write(dev_priv, regs.pp_div, in pps_init_registers()
1554 i915_mmio_reg_valid(regs.pp_div) ? in pps_init_registers()
1555 intel_de_read(dev_priv, regs.pp_div) : in pps_init_registers()