28 			    struct intel_pps *pps)  in pps_name()  argument
31 		switch (pps->pps_pipe) {  in pps_name()
35 			 * to always have a valid PPS when calling this.  in pps_name()
37 			return "PPS <none>";  in pps_name()
39 			return "PPS A";  in pps_name()
41 			return "PPS B";  in pps_name()
43 			MISSING_CASE(pps->pps_pipe);  in pps_name()
47 		switch (pps->pps_idx) {  in pps_name()
49 			return "PPS 0";  in pps_name()
51 			return "PPS 1";  in pps_name()
53 			MISSING_CASE(pps->pps_idx);  in pps_name()
58 	return "PPS <invalid>";  in pps_name()
70 	mutex_lock(&dev_priv->display.pps.mutex);  in intel_pps_lock()
80 	mutex_unlock(&dev_priv->display.pps.mutex);  in intel_pps_unlock()
91 	enum pipe pipe = intel_dp->pps.pps_pipe;  in vlv_power_sequencer_kick()
100 		     pps_name(dev_priv, &intel_dp->pps),  in vlv_power_sequencer_kick()
106 		    pps_name(dev_priv, &intel_dp->pps),  in vlv_power_sequencer_kick()
177 				    intel_dp->pps.active_pipe != INVALID_PIPE &&  in vlv_find_free_pps()
178 				    intel_dp->pps.active_pipe !=  in vlv_find_free_pps()
179 				    intel_dp->pps.pps_pipe);  in vlv_find_free_pps()
181 			if (intel_dp->pps.pps_pipe != INVALID_PIPE)  in vlv_find_free_pps()
182 				pipes &= ~(1 << intel_dp->pps.pps_pipe);  in vlv_find_free_pps()
185 				    intel_dp->pps.pps_pipe != INVALID_PIPE);  in vlv_find_free_pps()
187 			if (intel_dp->pps.active_pipe != INVALID_PIPE)  in vlv_find_free_pps()
188 				pipes &= ~(1 << intel_dp->pps.active_pipe);  in vlv_find_free_pps()
205 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in vlv_power_sequencer_pipe()
210 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE &&  in vlv_power_sequencer_pipe()
211 		    intel_dp->pps.active_pipe != intel_dp->pps.pps_pipe);  in vlv_power_sequencer_pipe()
213 	if (intel_dp->pps.pps_pipe != INVALID_PIPE)  in vlv_power_sequencer_pipe()
214 		return intel_dp->pps.pps_pipe;  in vlv_power_sequencer_pipe()
226 	intel_dp->pps.pps_pipe = pipe;  in vlv_power_sequencer_pipe()
230 		    pps_name(dev_priv, &intel_dp->pps),  in vlv_power_sequencer_pipe()
243 	return intel_dp->pps.pps_pipe;  in vlv_power_sequencer_pipe()
250 	int pps_idx = intel_dp->pps.pps_idx;  in bxt_power_sequencer_idx()
252 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in bxt_power_sequencer_idx()
257 	if (!intel_dp->pps.pps_reset)  in bxt_power_sequencer_idx()
260 	intel_dp->pps.pps_reset = false;  in bxt_power_sequencer_idx()
317 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in vlv_initial_power_sequencer_setup()
321 	intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,  in vlv_initial_power_sequencer_setup()
324 	if (intel_dp->pps.pps_pipe == INVALID_PIPE)  in vlv_initial_power_sequencer_setup()
325 		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,  in vlv_initial_power_sequencer_setup()
328 	if (intel_dp->pps.pps_pipe == INVALID_PIPE)  in vlv_initial_power_sequencer_setup()
329 		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,  in vlv_initial_power_sequencer_setup()
333 	if (intel_dp->pps.pps_pipe == INVALID_PIPE) {  in vlv_initial_power_sequencer_setup()
343 		    pps_name(dev_priv, &intel_dp->pps));  in vlv_initial_power_sequencer_setup()
367 	if (intel_dp->pps.pps_idx == 1 &&  in intel_pps_is_valid()
395 	lockdep_assert_held(&i915->display.pps.mutex);  in pps_initial_setup()
404 		intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;  in pps_initial_setup()
406 		intel_dp->pps.pps_idx = 0;  in pps_initial_setup()
408 	if (drm_WARN_ON(&i915->drm, intel_dp->pps.pps_idx >= intel_num_pps(i915)))  in pps_initial_setup()
409 		intel_dp->pps.pps_idx = -1;  in pps_initial_setup()
412 	if (intel_dp->pps.pps_idx < 0)  in pps_initial_setup()
413 		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_has_pp_on);  in pps_initial_setup()
415 	if (intel_dp->pps.pps_idx < 0)  in pps_initial_setup()
416 		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_has_vdd_on);  in pps_initial_setup()
418 	if (intel_dp->pps.pps_idx < 0) {  in pps_initial_setup()
419 		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_any);  in pps_initial_setup()
424 			    pps_name(i915, &intel_dp->pps));  in pps_initial_setup()
429 			    pps_name(i915, &intel_dp->pps));  in pps_initial_setup()
459 			    intel_dp->pps.active_pipe != INVALID_PIPE);  in intel_pps_reset_all()
465 			intel_dp->pps.pps_reset = true;  in intel_pps_reset_all()
467 			intel_dp->pps.pps_pipe = INVALID_PIPE;  in intel_pps_reset_all()
492 		pps_idx = intel_dp->pps.pps_idx;  in intel_pps_get_registers()
531 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in edp_have_panel_power()
534 	    intel_dp->pps.pps_pipe == INVALID_PIPE)  in edp_have_panel_power()
544 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in edp_have_panel_vdd()
547 	    intel_dp->pps.pps_pipe == INVALID_PIPE)  in edp_have_panel_vdd()
565 			 pps_name(dev_priv, &intel_dp->pps));  in intel_pps_check_power_unlocked()
569 			    pps_name(dev_priv, &intel_dp->pps),  in intel_pps_check_power_unlocked()
593 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in wait_panel_status()
603 		    pps_name(dev_priv, &intel_dp->pps),  in wait_panel_status()
613 			pps_name(dev_priv, &intel_dp->pps),  in wait_panel_status()
627 		    pps_name(i915, &intel_dp->pps));  in wait_panel_on()
638 		    pps_name(i915, &intel_dp->pps));  in wait_panel_off()
651 		    pps_name(i915, &intel_dp->pps));  in wait_panel_power_cycle()
656 	panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time);  in wait_panel_power_cycle()
660 	if (panel_power_off_duration < (s64)intel_dp->pps.panel_power_cycle_delay)  in wait_panel_power_cycle()
662 				       intel_dp->pps.panel_power_cycle_delay - panel_power_off_duration);  in wait_panel_power_cycle()
680 	wait_remaining_ms_from_jiffies(intel_dp->pps.last_power_on,  in wait_backlight_on()
681 				       intel_dp->pps.backlight_on_delay);  in wait_backlight_on()
686 	wait_remaining_ms_from_jiffies(intel_dp->pps.last_backlight_off,  in edp_wait_backlight_off()
687 				       intel_dp->pps.backlight_off_delay);  in edp_wait_backlight_off()
699 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in ilk_get_pp_control()
721 	bool need_to_disable = !intel_dp->pps.want_panel_vdd;  in intel_pps_vdd_on_unlocked()
723 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in intel_pps_vdd_on_unlocked()
728 	cancel_delayed_work(&intel_dp->pps.panel_vdd_work);  in intel_pps_vdd_on_unlocked()
729 	intel_dp->pps.want_panel_vdd = true;  in intel_pps_vdd_on_unlocked()
734 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref);  in intel_pps_vdd_on_unlocked()
735 	intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,  in intel_pps_vdd_on_unlocked()
743 		    pps_name(dev_priv, &intel_dp->pps));  in intel_pps_vdd_on_unlocked()
755 		    pps_name(dev_priv, &intel_dp->pps),  in intel_pps_vdd_on_unlocked()
765 			    pps_name(dev_priv, &intel_dp->pps));  in intel_pps_vdd_on_unlocked()
766 		msleep(intel_dp->pps.panel_power_up_delay);  in intel_pps_vdd_on_unlocked()
793 			pps_name(i915, &intel_dp->pps));  in intel_pps_vdd_on()
804 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in intel_pps_vdd_off_sync_unlocked()
806 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.want_panel_vdd);  in intel_pps_vdd_off_sync_unlocked()
813 		    pps_name(dev_priv, &intel_dp->pps));  in intel_pps_vdd_off_sync_unlocked()
827 		    pps_name(dev_priv, &intel_dp->pps),  in intel_pps_vdd_off_sync_unlocked()
832 		intel_dp->pps.panel_power_off_time = ktime_get_boottime();  in intel_pps_vdd_off_sync_unlocked()
836 				fetch_and_zero(&intel_dp->pps.vdd_wakeref));  in intel_pps_vdd_off_sync_unlocked()
846 	cancel_delayed_work_sync(&intel_dp->pps.panel_vdd_work);  in intel_pps_vdd_off_sync()
857 	struct intel_pps *pps = container_of(to_delayed_work(__work),  in edp_panel_vdd_work()  local
859 	struct intel_dp *intel_dp = container_of(pps, struct intel_dp, pps);  in edp_panel_vdd_work()
863 		if (!intel_dp->pps.want_panel_vdd)  in edp_panel_vdd_work()
877 	if (intel_dp->pps.initializing)  in edp_panel_vdd_schedule_off()
885 	delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);  in edp_panel_vdd_schedule_off()
887 			   &intel_dp->pps.panel_vdd_work, delay);  in edp_panel_vdd_schedule_off()
899 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in intel_pps_vdd_off_unlocked()
904 	I915_STATE_WARN(dev_priv, !intel_dp->pps.want_panel_vdd,  in intel_pps_vdd_off_unlocked()
908 			pps_name(dev_priv, &intel_dp->pps));  in intel_pps_vdd_off_unlocked()
910 	intel_dp->pps.want_panel_vdd = false;  in intel_pps_vdd_off_unlocked()
924 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in intel_pps_on_unlocked()
932 		    pps_name(dev_priv, &intel_dp->pps));  in intel_pps_on_unlocked()
938 		     pps_name(dev_priv, &intel_dp->pps)))  in intel_pps_on_unlocked()
960 	intel_dp->pps.last_power_on = jiffies;  in intel_pps_on_unlocked()
987 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in intel_pps_off_unlocked()
994 		    pps_name(dev_priv, &intel_dp->pps));  in intel_pps_off_unlocked()
996 	drm_WARN(&dev_priv->drm, !intel_dp->pps.want_panel_vdd,  in intel_pps_off_unlocked()
999 		 pps_name(dev_priv, &intel_dp->pps));  in intel_pps_off_unlocked()
1009 	intel_dp->pps.want_panel_vdd = false;  in intel_pps_off_unlocked()
1015 	intel_dp->pps.panel_power_off_time = ktime_get_boottime();  in intel_pps_off_unlocked()
1020 				fetch_and_zero(&intel_dp->pps.vdd_wakeref));  in intel_pps_off_unlocked()
1080 	intel_dp->pps.last_backlight_off = jiffies;  in intel_pps_backlight_off()
1114 	enum pipe pipe = intel_dp->pps.pps_pipe;  in vlv_detach_power_sequencer()
1117 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE);  in vlv_detach_power_sequencer()
1135 		    pps_name(dev_priv, &intel_dp->pps),  in vlv_detach_power_sequencer()
1140 	intel_dp->pps.pps_pipe = INVALID_PIPE;  in vlv_detach_power_sequencer()
1148 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in vlv_steal_power_sequencer()
1153 		drm_WARN(&dev_priv->drm, intel_dp->pps.active_pipe == pipe,  in vlv_steal_power_sequencer()
1154 			 "stealing PPS %c from active [ENCODER:%d:%s]\n",  in vlv_steal_power_sequencer()
1158 		if (intel_dp->pps.pps_pipe != pipe)  in vlv_steal_power_sequencer()
1162 			    "stealing PPS %c from [ENCODER:%d:%s]\n",  in vlv_steal_power_sequencer()
1178 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in vlv_pps_init()
1180 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE);  in vlv_pps_init()
1182 	if (intel_dp->pps.pps_pipe != INVALID_PIPE &&  in vlv_pps_init()
1183 	    intel_dp->pps.pps_pipe != crtc->pipe) {  in vlv_pps_init()
1198 	intel_dp->pps.active_pipe = crtc->pipe;  in vlv_pps_init()
1204 	intel_dp->pps.pps_pipe = crtc->pipe;  in vlv_pps_init()
1208 		    pps_name(dev_priv, &intel_dp->pps),  in vlv_pps_init()
1221 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in pps_vdd_init()
1235 		    pps_name(dev_priv, &intel_dp->pps));  in pps_vdd_init()
1236 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref);  in pps_vdd_init()
1237 	intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,  in pps_vdd_init()
1262 	intel_dp->pps.panel_power_off_time = 0;  in pps_init_timestamps()
1263 	intel_dp->pps.last_power_on = jiffies;  in pps_init_timestamps()
1264 	intel_dp->pps.last_backlight_off = jiffies;  in pps_init_timestamps()
1278 	/* Ensure PPS is unlocked */  in intel_pps_readout_hw_state()
1318 	struct edp_power_seq *sw = &intel_dp->pps.pps_delays;  in intel_pps_verify_state()
1324 		drm_err(&i915->drm, "PPS state mismatch\n");  in intel_pps_verify_state()
1341 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in pps_init_delays_bios()
1343 	if (!pps_delays_valid(&intel_dp->pps.bios_pps_delays))  in pps_init_delays_bios()
1344 		intel_pps_readout_hw_state(intel_dp, &intel_dp->pps.bios_pps_delays);  in pps_init_delays_bios()
1346 	*bios = intel_dp->pps.bios_pps_delays;  in pps_init_delays_bios()
1357 	*vbt = connector->panel.vbt.edp.pps;  in pps_init_delays_vbt()
1388 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in pps_init_delays_spec()
1409 		*final = &intel_dp->pps.pps_delays;  in pps_init_delays()
1411 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in pps_init_delays()
1434 	intel_dp->pps.panel_power_up_delay = get_delay(t1_t3);  in pps_init_delays()
1435 	intel_dp->pps.backlight_on_delay = get_delay(t8);  in pps_init_delays()
1436 	intel_dp->pps.backlight_off_delay = get_delay(t9);  in pps_init_delays()
1437 	intel_dp->pps.panel_power_down_delay = get_delay(t10);  in pps_init_delays()
1438 	intel_dp->pps.panel_power_cycle_delay = get_delay(t11_t12);  in pps_init_delays()
1443 		    intel_dp->pps.panel_power_up_delay,  in pps_init_delays()
1444 		    intel_dp->pps.panel_power_down_delay,  in pps_init_delays()
1445 		    intel_dp->pps.panel_power_cycle_delay);  in pps_init_delays()
1448 		    intel_dp->pps.backlight_on_delay,  in pps_init_delays()
1449 		    intel_dp->pps.backlight_off_delay);  in pps_init_delays()
1475 	const struct edp_power_seq *seq = &intel_dp->pps.pps_delays;  in pps_init_registers()
1477 	lockdep_assert_held(&dev_priv->display.pps.mutex);  in pps_init_registers()
1589 	intel_dp->pps.initializing = true;  in intel_pps_init()
1590 	INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);  in intel_pps_init()
1618 		 intel_dp->pps.pps_idx != connector->panel.vbt.backlight.controller,  in pps_init_late()
1621 		 intel_dp->pps.pps_idx, connector->panel.vbt.backlight.controller);  in pps_init_late()
1624 		intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;  in pps_init_late()
1635 		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays));  in intel_pps_init_late()
1639 		intel_dp->pps.initializing = false;  in intel_pps_init_late()
1667 		i915->display.pps.mmio_base = PCH_PPS_BASE;  in intel_pps_setup()
1669 		i915->display.pps.mmio_base = VLV_PPS_BASE;  in intel_pps_setup()
1671 		i915->display.pps.mmio_base = PPS_BASE;  in intel_pps_setup()