Lines Matching full:dpll

42  * enum intel_dpll_id - possible DPLL ids
44  * Enumeration of possible IDs for a DPLL. Real shared dpll ids must be >= 0.
48 	 * @DPLL_ID_PRIVATE: non-shared dpll in use
53 	 * @DPLL_ID_PCH_PLL_A: DPLL A in ILK, SNB and IVB
57 	 * @DPLL_ID_PCH_PLL_B: DPLL B in ILK, SNB and IVB
180 	u32 dpll;  member
191 	 * DPLL_CTRL1 has 6 bits for each each this DPLL. We store those in
194 	 * the DPLL.
228  * struct intel_shared_dpll_state - hold the DPLL atomic state
230  * This structure holds an atomic state for the DPLL, that can represent
239 	 * @pipe_mask: mask of pipes using this DPLL, active or not
244 	 * @hw_state: hardware configuration for the DPLL stored in
255 	 * @name: DPLL name; used for logging
265 	 * @id: unique indentifier for this DPLL; should match the index in the
275 	 *     Inform the state checker that the DPLL is kept enabled even if
294 	 * @active_mask: mask of active pipes (i.e. DPMS on) using this DPLL
310 	 * need to be grabbed to disable DC states while this DPLL is enabled
320 /* shared dpll functions */