Lines Matching refs:mg_pll_bias
2979 pll_state->mg_pll_bias = (m2div_frac ? DKL_PLL_BIAS_FRAC_EN_H : 0) | in icl_calc_mg_pll_state()
3030 pll_state->mg_pll_bias = in icl_calc_mg_pll_state()
3050 pll_state->mg_pll_bias &= pll_state->mg_pll_bias_mask; in icl_calc_mg_pll_state()
3070 if (pll_state->mg_pll_bias & DKL_PLL_BIAS_FRAC_EN_H) { in icl_ddi_mg_pll_get_freq()
3071 m2_frac = pll_state->mg_pll_bias & in icl_ddi_mg_pll_get_freq()
3441 hw_state->mg_pll_bias = intel_de_read(dev_priv, MG_PLL_BIAS(tc_port)); in mg_pll_get_hw_state()
3454 hw_state->mg_pll_bias &= hw_state->mg_pll_bias_mask; in mg_pll_get_hw_state()
3518 hw_state->mg_pll_bias = intel_dkl_phy_read(dev_priv, DKL_PLL_BIAS(tc_port)); in dkl_pll_get_hw_state()
3519 hw_state->mg_pll_bias &= (DKL_PLL_BIAS_FRAC_EN_H | in dkl_pll_get_hw_state()
3685 hw_state->mg_pll_bias_mask, hw_state->mg_pll_bias); in icl_mg_pll_write()
3747 val |= hw_state->mg_pll_bias; in dkl_pll_write()
3968 hw_state->mg_pll_bias, in icl_dump_hw_state()