250  * threads can't disable the power well while the caller tries to read a few
302  * This function set the "DC off" power well target_dc_state,
303  * based upon this target_dc_stste, "DC off" power well will
326 	 * If DC off power well is disabled, need to enable and disable the  in intel_display_power_set_target_dc_state()
327 	 * DC off power well to effect target DC state.  in intel_display_power_set_target_dc_state()
650 	 * power well disabling.  in release_async_put_domains()
1167 	 * expect us to program the abox_ctl0 register as well, even though  in icl_mbus_init()
1207 			"Display power well on\n");  in assert_can_disable_lcpll()
1377  * well is disabled and most interrupts are disabled, and these are also
1440 	struct i915_power_well *well;  in skl_display_core_init()  local
1453 	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);  in skl_display_core_init()
1454 	intel_power_well_enable(dev_priv, well);  in skl_display_core_init()
1456 	well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);  in skl_display_core_init()
1457 	intel_power_well_enable(dev_priv, well);  in skl_display_core_init()
1472 	struct i915_power_well *well;  in skl_display_core_uninit()  local
1490 	 * BSpec says to keep the MISC IO power well enabled here, only  in skl_display_core_uninit()
1491 	 * remove our request for power well 1.  in skl_display_core_uninit()
1492 	 * Note that even though the driver's request is removed power well 1  in skl_display_core_uninit()
1495 	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);  in skl_display_core_uninit()
1496 	intel_power_well_disable(dev_priv, well);  in skl_display_core_uninit()
1506 	struct i915_power_well *well;  in bxt_display_core_init()  local
1524 	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);  in bxt_display_core_init()
1525 	intel_power_well_enable(dev_priv, well);  in bxt_display_core_init()
1540 	struct i915_power_well *well;  in bxt_display_core_uninit()  local
1556 	 * Note that even though the driver's request is removed power well 1  in bxt_display_core_uninit()
1561 	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);  in bxt_display_core_uninit()
1562 	intel_power_well_disable(dev_priv, well);  in bxt_display_core_uninit()
1647 	struct i915_power_well *well;  in icl_display_core_init()  local
1667 	 * 3. Enable Power Well 1 (PG1).  in icl_display_core_init()
1671 	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);  in icl_display_core_init()
1672 	intel_power_well_enable(dev_priv, well);  in icl_display_core_init()
1716 	struct i915_power_well *well;  in icl_display_core_uninit()  local
1737 	 * 4. Disable Power Well 1 (PG1).  in icl_display_core_uninit()
1742 	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);  in icl_display_core_uninit()
1743 	intel_power_well_disable(dev_priv, well);  in icl_display_core_uninit()
1761 	 * power well state and lane status to reconstruct the  in chv_phy_control_init()
1907  * power well must match its HW enabled state, see
1981 	/* Remove the refcount we took to keep power well support disabled. */  in intel_power_domains_driver_remove()
1990 	/* Keep the power well enabled, but cancel its rpm wakeref. */  in intel_power_domains_driver_remove()
2000  * without a user for it (any user for a power well has taken a reference
2017 			    "BIOS left unused %s power well enabled, disabling it\n",  in intel_power_domains_sanitize_state()
2098 	 * Even if power well support was disabled we still want to disable  in intel_power_domains_suspend()
2168  * Verify if the reference count of each power well matches its HW enabled
2195 				"power well %s state mismatch (refcount %d/enabled %d)",  in intel_power_domains_verify_state()
2205 				"power well %s refcount/domain refcount mismatch "  in intel_power_domains_verify_state()
2307 	seq_printf(m, "%-25s %s\n", "Power well/domain", "Use count");  in intel_display_power_debug()