i915/display/intel_display_device.c

21 #define PIPE_A_OFFSET		0x70000
22 #define PIPE_B_OFFSET		0x71000
23 #define PIPE_C_OFFSET		0x72000
24 #define PIPE_D_OFFSET		0x73000
25 #define CHV_PIPE_C_OFFSET	0x74000
32 #define PIPE_EDP_OFFSET	0x7f000
34 /* ICL DSI 0 and 1 */
35 #define PIPE_DSI0_OFFSET	0x7b000
36 #define PIPE_DSI1_OFFSET	0x7b800
38 #define TRANSCODER_A_OFFSET 0x60000
39 #define TRANSCODER_B_OFFSET 0x61000
40 #define TRANSCODER_C_OFFSET 0x62000
41 #define CHV_TRANSCODER_C_OFFSET 0x63000
42 #define TRANSCODER_D_OFFSET 0x63000
43 #define TRANSCODER_EDP_OFFSET 0x6f000
44 #define TRANSCODER_DSI0_OFFSET	0x6b000
45 #define TRANSCODER_DSI1_OFFSET	0x6b800
47 #define CURSOR_A_OFFSET 0x70080
48 #define CURSOR_B_OFFSET 0x700c0
49 #define CHV_CURSOR_C_OFFSET 0x700e0
50 #define IVB_CURSOR_B_OFFSET 0x71080
51 #define IVB_CURSOR_C_OFFSET 0x72080
52 #define TGL_CURSOR_D_OFFSET 0x73080
511 	.abox_mask = BIT(0), \
626 	.abox_mask = BIT(0),
628 	.has_psr_hw_tracking = 0,
640 	.has_psr_hw_tracking = 0,
647 	.abox_mask = GENMASK(1, 0),						\
692 	.has_psr_hw_tracking = 0,
736 		INTEL_IVB_Q_IDS(0),  in has_no_display()
805 	{ 14,  0, &xe_lpdp_display },
821 	*ver = 0;  in probe_gmdid_display()
822 	*rel = 0;  in probe_gmdid_display()
823 	*step = 0;  in probe_gmdid_display()
825 	addr = pci_iomap_range(pdev, 0, i915_mmio_reg_offset(GMD_ID_DISPLAY), sizeof(u32));  in probe_gmdid_display()
834 	if (val == 0) {  in probe_gmdid_display()
843 	for (i = 0; i < ARRAY_SIZE(gmdid_display_map); i++)  in probe_gmdid_display()
868 	for (i = 0; i < ARRAY_SIZE(intel_display_ids); i++) {  in intel_display_device_probe()
891 			display_runtime->num_scalers[pipe] = 0;  in intel_display_device_info_runtime_init()
945 		 * reads don't land anywhere. In that case, we read 0s.  in intel_display_device_info_runtime_init()
989 			display_runtime->has_hdcp = 0;  in intel_display_device_info_runtime_init()
992 			display_runtime->fbc_mask = 0;  in intel_display_device_info_runtime_init()
995 			display_runtime->has_dmc = 0;  in intel_display_device_info_runtime_init()
999 			display_runtime->has_dsc = 0;  in intel_display_device_info_runtime_init()
1005 	memset(display_runtime, 0, sizeof(*display_runtime));  in intel_display_device_info_runtime_init()