Lines Matching refs:FW_WM
136 #define FW_WM(value, plane) \ macro
661 reg |= FW_WM(wm, SR); in pnv_update_wm()
670 FW_WM(wm, CURSOR_SR)); in pnv_update_wm()
676 intel_uncore_rmw(&dev_priv->uncore, DSPFW3, DSPFW_HPLL_SR_MASK, FW_WM(wm, HPLL_SR)); in pnv_update_wm()
684 reg |= FW_WM(wm, HPLL_CURSOR); in pnv_update_wm()
720 FW_WM(wm->sr.plane, SR) | in g4x_write_wm_values()
721 FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | in g4x_write_wm_values()
722 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) | in g4x_write_wm_values()
723 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA)); in g4x_write_wm_values()
726 FW_WM(wm->sr.fbc, FBC_SR) | in g4x_write_wm_values()
727 FW_WM(wm->hpll.fbc, FBC_HPLL_SR) | in g4x_write_wm_values()
728 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) | in g4x_write_wm_values()
729 FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | in g4x_write_wm_values()
730 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA)); in g4x_write_wm_values()
733 FW_WM(wm->sr.cursor, CURSOR_SR) | in g4x_write_wm_values()
734 FW_WM(wm->hpll.cursor, HPLL_CURSOR) | in g4x_write_wm_values()
735 FW_WM(wm->hpll.plane, HPLL_SR)); in g4x_write_wm_values()
770 FW_WM(wm->sr.plane, SR) | in vlv_write_wm_values()
771 FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | in vlv_write_wm_values()
776 FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | in vlv_write_wm_values()
779 FW_WM(wm->sr.cursor, CURSOR_SR)); in vlv_write_wm_values()
790 FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); in vlv_write_wm_values()
792 FW_WM(wm->sr.plane >> 9, SR_HI) | in vlv_write_wm_values()
793 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) | in vlv_write_wm_values()
794 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) | in vlv_write_wm_values()
795 FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | in vlv_write_wm_values()
796 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) | in vlv_write_wm_values()
797 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) | in vlv_write_wm_values()
798 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | in vlv_write_wm_values()
799 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) | in vlv_write_wm_values()
800 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) | in vlv_write_wm_values()
801 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); in vlv_write_wm_values()
807 FW_WM(wm->sr.plane >> 9, SR_HI) | in vlv_write_wm_values()
808 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) | in vlv_write_wm_values()
809 FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) | in vlv_write_wm_values()
810 FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | in vlv_write_wm_values()
811 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) | in vlv_write_wm_values()
812 FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) | in vlv_write_wm_values()
813 FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); in vlv_write_wm_values()
2066 intel_uncore_write(&dev_priv->uncore, DSPFW1, FW_WM(srwm, SR) | in i965_update_wm()
2067 FW_WM(8, CURSORB) | in i965_update_wm()
2068 FW_WM(8, PLANEB) | in i965_update_wm()
2069 FW_WM(8, PLANEA)); in i965_update_wm()
2070 intel_uncore_write(&dev_priv->uncore, DSPFW2, FW_WM(8, CURSORA) | in i965_update_wm()
2071 FW_WM(8, PLANEC_OLD)); in i965_update_wm()
2073 intel_uncore_write(&dev_priv->uncore, DSPFW3, FW_WM(cursor_sr, CURSOR_SR)); in i965_update_wm()
2079 #undef FW_WM