Lines Matching refs:DPLL_CTRL
79 #define DPLL_CTRL 0x6000 macro
295 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
297 REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_mode_set()
311 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
314 REG_WRITE(DPLL_CTRL, 0x00000008); in oaktrail_crtc_hdmi_mode_set()
317 REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN)); in oaktrail_crtc_hdmi_mode_set()
422 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
424 REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
436 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
438 REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
747 hdmi_dev->saveDPLL_CTRL = PSB_RVDC32(DPLL_CTRL); in oaktrail_hdmi_save()
800 PSB_WVDC32(hdmi_dev->saveDPLL_CTRL, DPLL_CTRL); in oaktrail_hdmi_restore()