1 // SPDX-License-Identifier: GPL-2.0
18 	u32 (*sample)(struct etnaviv_gpu *gpu,
40 static u32 perf_reg_read(struct etnaviv_gpu *gpu,  in perf_reg_read()  argument
44 	gpu_write(gpu, domain->profile_config, signal->data);  in perf_reg_read()
46 	return gpu_read(gpu, domain->profile_read);  in perf_reg_read()
49 static inline void pipe_select(struct etnaviv_gpu *gpu, u32 clock, unsigned pipe)  in pipe_select()  argument
54 	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);  in pipe_select()
57 static u32 pipe_perf_reg_read(struct etnaviv_gpu *gpu,  in pipe_perf_reg_read()  argument
61 	u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in pipe_perf_reg_read()
65 	for (i = 0; i < gpu->identity.pixel_pipes; i++) {  in pipe_perf_reg_read()
66 		pipe_select(gpu, clock, i);  in pipe_perf_reg_read()
67 		value += perf_reg_read(gpu, domain, signal);  in pipe_perf_reg_read()
70 	/* switch back to pixel pipe 0 to prevent GPU hang */  in pipe_perf_reg_read()
71 	pipe_select(gpu, clock, 0);  in pipe_perf_reg_read()
76 static u32 pipe_reg_read(struct etnaviv_gpu *gpu,  in pipe_reg_read()  argument
80 	u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in pipe_reg_read()
84 	for (i = 0; i < gpu->identity.pixel_pipes; i++) {  in pipe_reg_read()
85 		pipe_select(gpu, clock, i);  in pipe_reg_read()
86 		value += gpu_read(gpu, signal->data);  in pipe_reg_read()
89 	/* switch back to pixel pipe 0 to prevent GPU hang */  in pipe_reg_read()
90 	pipe_select(gpu, clock, 0);  in pipe_reg_read()
95 static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu,  in hi_total_cycle_read()  argument
101 	if (gpu->identity.model == chipModel_GC880 ||  in hi_total_cycle_read()
102 		gpu->identity.model == chipModel_GC2000 ||  in hi_total_cycle_read()
103 		gpu->identity.model == chipModel_GC2100)  in hi_total_cycle_read()
106 	return gpu_read(gpu, reg);  in hi_total_cycle_read()
109 static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu,  in hi_total_idle_cycle_read()  argument
115 	if (gpu->identity.model == chipModel_GC880 ||  in hi_total_idle_cycle_read()
116 		gpu->identity.model == chipModel_GC2000 ||  in hi_total_idle_cycle_read()
117 		gpu->identity.model == chipModel_GC2100)  in hi_total_idle_cycle_read()
120 	return gpu_read(gpu, reg);  in hi_total_idle_cycle_read()
462 static unsigned int num_pm_domains(const struct etnaviv_gpu *gpu)  in num_pm_domains()  argument
469 		if (gpu->identity.features & meta->feature)  in num_pm_domains()
470 			num += meta->nr_domains;  in num_pm_domains()
476 static const struct etnaviv_pm_domain *pm_domain(const struct etnaviv_gpu *gpu,  in pm_domain()  argument
485 		if (!(gpu->identity.features & meta->feature))  in pm_domain()
488 		if (index - offset >= meta->nr_domains) {  in pm_domain()
489 			offset += meta->nr_domains;  in pm_domain()
493 		domain = meta->domains + (index - offset);  in pm_domain()
499 int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu,  in etnaviv_pm_query_dom()  argument
502 	const unsigned int nr_domains = num_pm_domains(gpu);  in etnaviv_pm_query_dom()
505 	if (domain->iter >= nr_domains)  in etnaviv_pm_query_dom()
506 		return -EINVAL;  in etnaviv_pm_query_dom()
508 	dom = pm_domain(gpu, domain->iter);  in etnaviv_pm_query_dom()
510 		return -EINVAL;  in etnaviv_pm_query_dom()
512 	domain->id = domain->iter;  in etnaviv_pm_query_dom()
513 	domain->nr_signals = dom->nr_signals;  in etnaviv_pm_query_dom()
514 	strncpy(domain->name, dom->name, sizeof(domain->name));  in etnaviv_pm_query_dom()
516 	domain->iter++;  in etnaviv_pm_query_dom()
517 	if (domain->iter == nr_domains)  in etnaviv_pm_query_dom()
518 		domain->iter = 0xff;  in etnaviv_pm_query_dom()
523 int etnaviv_pm_query_sig(struct etnaviv_gpu *gpu,  in etnaviv_pm_query_sig()  argument
526 	const unsigned int nr_domains = num_pm_domains(gpu);  in etnaviv_pm_query_sig()
530 	if (signal->domain >= nr_domains)  in etnaviv_pm_query_sig()
531 		return -EINVAL;  in etnaviv_pm_query_sig()
533 	dom = pm_domain(gpu, signal->domain);  in etnaviv_pm_query_sig()
535 		return -EINVAL;  in etnaviv_pm_query_sig()
537 	if (signal->iter >= dom->nr_signals)  in etnaviv_pm_query_sig()
538 		return -EINVAL;  in etnaviv_pm_query_sig()
540 	sig = &dom->signal[signal->iter];  in etnaviv_pm_query_sig()
542 	signal->id = signal->iter;  in etnaviv_pm_query_sig()
543 	strncpy(signal->name, sig->name, sizeof(signal->name));  in etnaviv_pm_query_sig()
545 	signal->iter++;  in etnaviv_pm_query_sig()
546 	if (signal->iter == dom->nr_signals)  in etnaviv_pm_query_sig()
547 		signal->iter = 0xffff;  in etnaviv_pm_query_sig()
558 	if (r->domain >= meta->nr_domains)  in etnaviv_pm_req_validate()
559 		return -EINVAL;  in etnaviv_pm_req_validate()
561 	dom = meta->domains + r->domain;  in etnaviv_pm_req_validate()
563 	if (r->signal >= dom->nr_signals)  in etnaviv_pm_req_validate()
564 		return -EINVAL;  in etnaviv_pm_req_validate()
569 void etnaviv_perfmon_process(struct etnaviv_gpu *gpu,  in etnaviv_perfmon_process()  argument
575 	u32 *bo = pmr->bo_vma;  in etnaviv_perfmon_process()
578 	dom = meta->domains + pmr->domain;  in etnaviv_perfmon_process()
579 	sig = &dom->signal[pmr->signal];  in etnaviv_perfmon_process()
580 	val = sig->sample(gpu, dom, sig);  in etnaviv_perfmon_process()
582 	*(bo + pmr->offset) = val;  in etnaviv_perfmon_process()