89 	void (*sync_point)(struct etnaviv_gpu *gpu, struct etnaviv_event *event);
166 static inline void gpu_write(struct etnaviv_gpu *gpu, u32 reg, u32 data)  in gpu_write()  argument
168 	writel(data, gpu->mmio + reg);  in gpu_write()
171 static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg)  in gpu_read()  argument
173 	return readl(gpu->mmio + reg);  in gpu_read()
176 static inline u32 gpu_fix_power_address(struct etnaviv_gpu *gpu, u32 reg)  in gpu_fix_power_address()  argument
179 	if (gpu->identity.model == chipModel_GC300 &&  in gpu_fix_power_address()
180 	    gpu->identity.revision < 0x2000)  in gpu_fix_power_address()
186 static inline void gpu_write_power(struct etnaviv_gpu *gpu, u32 reg, u32 data)  in gpu_write_power()  argument
188 	writel(data, gpu->mmio + gpu_fix_power_address(gpu, reg));  in gpu_write_power()
191 static inline u32 gpu_read_power(struct etnaviv_gpu *gpu, u32 reg)  in gpu_read_power()  argument
193 	return readl(gpu->mmio + gpu_fix_power_address(gpu, reg));  in gpu_read_power()
196 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value);
198 int etnaviv_gpu_init(struct etnaviv_gpu *gpu);
199 bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu);
202 int etnaviv_gpu_debugfs(struct etnaviv_gpu *gpu, struct seq_file *m);
206 void etnaviv_gpu_retire(struct etnaviv_gpu *gpu);
207 int etnaviv_gpu_wait_fence_interruptible(struct etnaviv_gpu *gpu,
209 int etnaviv_gpu_wait_obj_inactive(struct etnaviv_gpu *gpu,
213 int etnaviv_gpu_pm_get_sync(struct etnaviv_gpu *gpu);
214 void etnaviv_gpu_pm_put(struct etnaviv_gpu *gpu);
215 int etnaviv_gpu_wait_idle(struct etnaviv_gpu *gpu, unsigned int timeout_ms);
216 void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch);