Lines Matching refs:tc358768_write
184 static void tc358768_write(struct tc358768_priv *priv, u32 reg, u32 val) in tc358768_write() function
229 tc358768_write(priv, reg, tmp); in tc358768_update_bits()
235 tc358768_write(priv, TC358768_SYSCTL, 1); in tc358768_sw_reset()
237 tc358768_write(priv, TC358768_SYSCTL, 0); in tc358768_sw_reset()
498 tc358768_write(priv, TC358768_DSICMD_TYPE, in tc358768_dsi_host_transfer()
500 tc358768_write(priv, TC358768_DSICMD_WC, 0); in tc358768_dsi_host_transfer()
501 tc358768_write(priv, TC358768_DSICMD_WD0, in tc358768_dsi_host_transfer()
506 tc358768_write(priv, TC358768_DSICMD_TYPE, in tc358768_dsi_host_transfer()
508 tc358768_write(priv, TC358768_DSICMD_WC, packet.payload_length); in tc358768_dsi_host_transfer()
515 tc358768_write(priv, TC358768_DSICMD_WD0 + i, val); in tc358768_dsi_host_transfer()
520 tc358768_write(priv, TC358768_DSICMD_TX, 1); in tc358768_dsi_host_transfer()
618 tc358768_write(priv, TC358768_PLLCTL0, (prd << 12) | fbd); in tc358768_setup_pll()
621 tc358768_write(priv, TC358768_PLLCTL1, in tc358768_setup_pll()
628 tc358768_write(priv, TC358768_PLLCTL1, in tc358768_setup_pll()
893 tc358768_write(priv, TC358768_VSDLY, dsi_vsdly - internal_dly); in tc358768_bridge_pre_enable()
895 tc358768_write(priv, TC358768_DATAFMT, val); in tc358768_bridge_pre_enable()
896 tc358768_write(priv, TC358768_DSITX_DT, data_type); in tc358768_bridge_pre_enable()
899 tc358768_write(priv, TC358768_CLW_CNTRL, 0x0000); in tc358768_bridge_pre_enable()
902 tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); in tc358768_bridge_pre_enable()
914 tc358768_write(priv, TC358768_LINEINITCNT, val); in tc358768_bridge_pre_enable()
920 tc358768_write(priv, TC358768_LPTXTIMECNT, val); in tc358768_bridge_pre_enable()
930 tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); in tc358768_bridge_pre_enable()
936 tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); in tc358768_bridge_pre_enable()
947 tc358768_write(priv, TC358768_THS_HEADERCNT, val); in tc358768_bridge_pre_enable()
953 tc358768_write(priv, TC358768_TWAKEUP, val); in tc358768_bridge_pre_enable()
959 tc358768_write(priv, TC358768_TCLK_POSTCNT, val); in tc358768_bridge_pre_enable()
966 tc358768_write(priv, TC358768_THS_TRAILCNT, val); in tc358768_bridge_pre_enable()
971 tc358768_write(priv, TC358768_HSTXVREGEN, val); in tc358768_bridge_pre_enable()
973 tc358768_write(priv, TC358768_TXOPTIONCNTRL, in tc358768_bridge_pre_enable()
984 tc358768_write(priv, TC358768_BTACNTRL1, val); in tc358768_bridge_pre_enable()
987 tc358768_write(priv, TC358768_STARTCNTRL, 1); in tc358768_bridge_pre_enable()
991 tc358768_write(priv, TC358768_DSI_EVENT, 0); in tc358768_bridge_pre_enable()
994 tc358768_write(priv, TC358768_DSI_VACT, vm.vactive); in tc358768_bridge_pre_enable()
997 tc358768_write(priv, TC358768_DSI_VSW, vm.vsync_len); in tc358768_bridge_pre_enable()
1000 tc358768_write(priv, TC358768_DSI_VBPR, vm.vback_porch); in tc358768_bridge_pre_enable()
1003 tc358768_write(priv, TC358768_DSI_EVENT, 1); in tc358768_bridge_pre_enable()
1006 tc358768_write(priv, TC358768_DSI_VACT, vm.vactive); in tc358768_bridge_pre_enable()
1009 tc358768_write(priv, TC358768_DSI_VSW, in tc358768_bridge_pre_enable()
1013 tc358768_write(priv, TC358768_DSI_VBPR, 0); in tc358768_bridge_pre_enable()
1017 tc358768_write(priv, TC358768_DSI_HSW, dsi_hsw); in tc358768_bridge_pre_enable()
1020 tc358768_write(priv, TC358768_DSI_HBPR, dsi_hbp); in tc358768_bridge_pre_enable()
1023 tc358768_write(priv, TC358768_DSI_HACT, hact); in tc358768_bridge_pre_enable()
1034 tc358768_write(priv, TC358768_DSI_START, 0x1); in tc358768_bridge_pre_enable()
1040 tc358768_write(priv, TC358768_DSI_CONFW, val); in tc358768_bridge_pre_enable()
1053 tc358768_write(priv, TC358768_DSI_CONFW, val); in tc358768_bridge_pre_enable()
1057 tc358768_write(priv, TC358768_DSI_CONFW, val); in tc358768_bridge_pre_enable()