Lines Matching refs:AST_IO_CRTC_PORT

52 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, 0x00);  in ast_set_def_ext_reg()
61 		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, index, 0x00, *ext_reg_info);  in ast_set_def_ext_reg()
70 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x8c, 0x00, 0x01);  in ast_set_def_ext_reg()
71 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x00, 0x00);  in ast_set_def_ext_reg()
77 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff, reg);  in ast_set_def_ext_reg()
248 	j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);  in ast_init_dram_reg()
328 		j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);  in ast_init_dram_reg()
352 			ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x80);	/* Enable DVO */  in ast_post_gpu()
1565 	reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);  in ast_post_chip_2300()
1637 		reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);  in ast_post_chip_2300()
2030 	reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);  in ast_post_chip_2500()
2078 		reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);  in ast_post_chip_2500()