Lines Matching refs:AVFS_VOLTAGE_SOC

2869 …adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);  in beige_goby_dump_pptable()
2878 pptable->qAvfsGb[AVFS_VOLTAGE_SOC].a, in beige_goby_dump_pptable()
2879 pptable->qAvfsGb[AVFS_VOLTAGE_SOC].b, in beige_goby_dump_pptable()
2880 pptable->qAvfsGb[AVFS_VOLTAGE_SOC].c); in beige_goby_dump_pptable()
2897 pptable->qAgingGb[AVFS_VOLTAGE_SOC].m, in beige_goby_dump_pptable()
2898 pptable->qAgingGb[AVFS_VOLTAGE_SOC].b); in beige_goby_dump_pptable()
2913 pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a, in beige_goby_dump_pptable()
2914 pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b, in beige_goby_dump_pptable()
2915 pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c); in beige_goby_dump_pptable()
2918 dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]); in beige_goby_dump_pptable()
2921 …mu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]); in beige_goby_dump_pptable()
2926 …dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC in beige_goby_dump_pptable()
2928 …dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC in beige_goby_dump_pptable()
2931 dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]); in beige_goby_dump_pptable()
3507 …adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]); in sienna_cichlid_dump_pptable()
3516 pptable->qAvfsGb[AVFS_VOLTAGE_SOC].a, in sienna_cichlid_dump_pptable()
3517 pptable->qAvfsGb[AVFS_VOLTAGE_SOC].b, in sienna_cichlid_dump_pptable()
3518 pptable->qAvfsGb[AVFS_VOLTAGE_SOC].c); in sienna_cichlid_dump_pptable()
3535 pptable->qAgingGb[AVFS_VOLTAGE_SOC].m, in sienna_cichlid_dump_pptable()
3536 pptable->qAgingGb[AVFS_VOLTAGE_SOC].b); in sienna_cichlid_dump_pptable()
3551 pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a, in sienna_cichlid_dump_pptable()
3552 pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b, in sienna_cichlid_dump_pptable()
3553 pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c); in sienna_cichlid_dump_pptable()
3556 dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]); in sienna_cichlid_dump_pptable()
3559 …mu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]); in sienna_cichlid_dump_pptable()
3564 …dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC in sienna_cichlid_dump_pptable()
3566 …dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC in sienna_cichlid_dump_pptable()
3569 dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]); in sienna_cichlid_dump_pptable()